TLE6262G datasheet(28/38 Pages) INFINEON

28 / 38 page

Final Data TLE 6262 G

version: 2.03 date: 2002-03-20

SPI-Interface

Logic Inputs DI, CLK and CSN

H-input voltage threshold

––0.7 *

–

L-input voltage threshold

0.3 *

––V

–

Hysteresis of input voltage

IHY

200

500

–

Pull up current at pin CSN

ICSN

-100

-25

-5

VCSN = 0.7 ´ VCC

Pull down current at pin DI

and CLK

ICLK/DI

525

100

VDI = 0.2 ´ VCC

Input capacitance

at pin CSN, DI or CLK

–10

0V < VCC < 5.25 V

Logic Output DO

H-output voltage level

DOH

– 1.0

– 0.7

–V

IDOH =1 mA

L-output voltage level

DOL

–

0.2

0.4

IDOL = – 1.6 mA

Tri-state leakage current

DOLK

-10

–

VCSN = VCC

0V < VDO < VCC

Tri-state input capacitance

–10

VCSN = VCC

0 V < VCC < 5.25 V

Data Input Timing

Clock period

pCLK

1000

–

Clock high time

CLKH

500

–

Clock low time

CLKL

500

–

Clock low before CSN low

bef

500

–

2.3

Electrical Characteristics (cont’d)

9V <

VS <16V; ICC = -100

mA; normal mode; all outputs open; – 40 °C< Tj < 150 °C; CAN-

transceiver circuitry: – 40

°C< Tj < 125 °C; all voltages with respect to ground; positive current

defined flowing into pin; unless otherwise specified.

Parameter

Symbol

Limit Values

Unit Test Condition

min.

typ.

max.

TLE6262G Datasheet(PDF) 28 Page - Infineon Technologies AG

TLE6262G Datasheet(HTML) 28 Page - Infineon Technologies AG

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38

Datasheet Download

Link URL