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TMDS181I Datasheet(PDF) 49 Page - Texas Instruments |
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TMDS181I Datasheet(HTML) 49 Page - Texas Instruments |
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49 / 58 page ![]() 1 VCC VCC 2k3 2k3 VCC VCC 2k3 2k3 GND Place VCC and VDD decoupling caps as close to VCC and VDD pins as possible Match High Speed traces length as close as possible to minimize Skew Match High Speed traces length as close as possible to minimize Skew HPD_SRC HPD_SNK IN_D2p/n IN_D1p/n IN_D0p/n OUT_D2p/n I2C_EN/PIN OUT_D1p/n SDA_SRC SDA_CTL SCL_SRC SCL_CTL VSADJ 65k3 65k3 VCC GND IN_CLKp/n 5V 5V 2k3 2k3 SDA_SNK SCL_SNK GND VCC 65k3 65k3 A1 OUT_D0p/n OUT_CLKp/n SWAP/POL VCC GND GND VCC 65k3 65k3 TX_TERM_CTL ARC_OUT SPDIF_IN GND 553 1µF GND GND 1µF 65k3 65k3 TMDS181, TMDS181I www.ti.com SLASE75A – AUGUST 2015 – REVISED OCTOBER 2015 11.2 Layout Example A. If ARC is not used, tie a 500 k Ω resistor to GND at the SPDIF_IN pin. B. The 55 Ω resistor to GND on the ARC_OUT pin is implementation specific and may not be needed if it is already implemented elsewhere. Figure 39. Layout Example – Source Side Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback 49 Product Folder Links: TMDS181 TMDS181I |
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