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LXT972A Datasheet(PDF) 46 Page - Intel Corporation |
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LXT972A Datasheet(HTML) 46 Page - Intel Corporation |
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46 / 70 page ![]() LXT972A — 3.3V Dual-Speed Fast Ethernet Transceiver Datasheet 46 Datasheet Table 22. 100BASE-TX Transceiver Characteristics Parameter Sym Min Typ 1 Max Units Test Conditions Peak differential output voltage VP 0.95 – 1.05 V Note 2 Signal amplitude symmetry Vss 98 – 102 % Note 2 Signal rise/fall time TRF 3.0 – 5.0 ns Note 2 Rise/fall time symmetry TRFS –– 0.5 ns Note 2 Duty cycle distortion DCD 35 50 65 % Offset from 16ns pulse width at 50% of pulse peak Overshoot/Undershoot VOS –– 5% – Jitter (measured differentially) ––– 1.4 ns – 1. Typical values are at 25 °C and are for design aid only; not guaranteed and not subject to production testing. 2. Measured at the line side of the transformer, line replaced by 100 Ω(+/-1%) resistor. Table 23. 10BASE-T Transceiver Characteristics Parameter Sym Min Typ Max Units Test Conditions Transmitter Peak differential output voltage VOP 2.2 2.5 2.8 V With transformer, line replaced by 100 Ω resistor Transition timing jitter added by the MAU and PLS sections -0 2 11 ns After line model specified by IEEE 802.3 for 10BASE-T MAU Receiver Receive Input Impedance ZIN -- 22 k Ω Differential Squelch Threshold VDS 300 420 585 mV Table 24. 10BASE-T Link Integrity Timing Characteristics Parameter Sym Min Typ Max Units Test Conditions Time Link Loss Receive TLL 50 – 150 ms – Link Pulse TLP 2 – 7 Link Pulses – Link Min Receive Timer TLR MIN 2 – 7ms – Link Max Receive Timer TLR MAX 50 – 150 ms – Link Transmit Period Tlt 8 – 24 ms – Link Pulse Width Tlpw 60 – 150 ns – 1. Typical values are at 25 °C and are for design aid only; not guaranteed and not subject to production testing. |
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