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TLV809K33DBVT Datasheet(PDF) 3 Page - Texas Instruments |
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TLV809K33DBVT Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 20 page ![]() 2 3 1 RESET V DD GND 3 TLV809 www.ti.com SLVSA03D – JUNE 2010 – REVISED MARCH 2016 Product Folder Links: TLV809 Submit Documentation Feedback Copyright © 2010–2016, Texas Instruments Incorporated 5 Voltage Options PRODUCT THRESHOLD VOLTAGE TLV809J25 2.25 V TLV809L30 2.64 V TLV809K33 2.93 V TLV809I50 4.55 V 6 Pin Configuration and Functions DBV, DBZ Packages 3-Pin SOT-23 Top View Pin Functions PIN I/O DESCRIPTION NO. NAME 1 GND — Ground pin. This pin must be connected to ground with a low-impedance connection. 2 RESET O RESET pin. RESET is an active low signal, asserting when VDD is below the threshold voltage. When VDD rises above VIT, there is a delay time (td) until RESET deasserts. RESET is a push-pull output stage. 3 VDD I Supply voltage pin. A 0.1-µF ceramic capacitor from this pin to ground is recommended to improve stability of the threshold voltage. (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltage values are with respect to GND. For reliable operation, do not operate the device at 7 V for more than t = 1000h continuously. 7 Specifications 7.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) MIN MAX UNIT VDD Supply voltage(2) 7 V All other pins(2) –0.3 7 IOL Maximum low output current 5 mA IOH Maximum high output current –5 mA IIK Input clamp current (VI < 0 or VI > VDD) ±20 mA IOK Output clamp current (VO < 0 or VO > VDD) ±20 mA TA Operating free-air temperature –40 85 °C Tstg Storage temperature –65 150 °C |
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