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TLV809K33DBVT Datasheet(PDF) 8 Page - Texas Instruments |
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TLV809K33DBVT Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 20 page ![]() RESET V DD t d V +V IT HYS - 1.1V ValidOutput V DD Transient Amplitude Duration V IT- tw 8 TLV809 SLVSA03D – JUNE 2010 – REVISED MARCH 2016 www.ti.com Product Folder Links: TLV809 Submit Documentation Feedback Copyright © 2010–2016, Texas Instruments Incorporated 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 9.1 Application Information 9.1.1 VDD Transient Rejection The device has built-in rejection of fast transients on the VDD pin. The rejection of transients depends on both the duration and the amplitude of the transient. The amplitude of the transient is measured from the bottom of the transient to the negative threshold voltage of the device, as shown in Figure 8. Figure 8. Voltage Transient Measurement The device does not respond to transients that are fast duration and low amplitude or long duration and small amplitude. Figure 7 illustrates the relationship between the transient amplitude and duration needed to trigger a reset. Any combination of duration and amplitude above the curve generates a reset signal. 9.1.2 Reset During Power-Up and Power-Down The device output is valid when VDD is greater than 1.1 V. When VDD is less than 1.1 V, the output transistor turns off and becomes high impedance. The voltage on the RESET pin rises to the voltage level connected to the pullup resistor. Figure 9 shows a typical waveform for power-up. Figure 9. Power-Up Response |
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