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P-0.1

02/29/12

PI6C49015

Embedded Clock Generator

Byte 0 - Bit 6 and Bit 5 Functionality

Bit 6

Bit 5

Description

0

X

PD_RESET HW pin/signal = enabled

1

0

Disables all outputs and tri-states the outputs, PD_RESET HW pin/signal = DO NOT CARE

1

1

Enable all outputs, PD_RESET HW pin/signal = DON'T CARE

Byte 1: Control Register

Bit

Description

Type

Power Up Con-

dition

Output(s) Affected

Notes

7

Reserved

RW

Undefined

Not Applicable

6

OE for 25M_Out1

RW

1

25M_Out1

0 = disabled

1 = enabled

5

Reserved

RW

Undefined

Not Applicable

4

OE for 100M_Q4 HCSL output

RW

1

100M_Q4

0=disable

1 = enabled

3

Reserved

RW

Undefined

Not Applicable

2

OE for 100M_Q3 HCSL output

RW

1

100M_Q3

0=disable

1 = enabled

1 to 0

Reserved

RW

Undefined

Not Applicable

Byte 2: Control Register

Bit

Description

Type

Power Up Condi-

tion

Output(s) Affected

Notes

7 to 5

Reserved

RW

Undefined

Not Applicable

4 to 0

Reserved

R

Undefined

Not Applicable

12-0168