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PI6C49018 Datasheet(PDF) 10 Page - Pericom Semiconductor Corporation

Part # PI6C49018
Description  Low Power Networking Clock Generator
PDF  13 Pages
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Manufacturer  PERICOM [Pericom Semiconductor Corporation]
Direct Link  http://www.pericom.com
Logo PERICOM - Pericom Semiconductor Corporation

PI6C49018 Datasheet(HTML) 10 Page - Pericom Semiconductor Corporation

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www.pericom.com
PI6C49018
Rev. A
12/10/2014
PI6C49018
Low Power Networking Clock Generator
Electrical Characteristics - 100MHz Differential HCSL Outputs
Unless otherwise specified, V
DD=3.3V±10%, Ambient Temperature –40°C to +85°C
Parameter
Symbol
Conditions
Min Typ Max Units
Output Frequency
100
MHz
Cycle-to-Cycle Jitter
T
CC/Jitter
150
ps
Peak-to-Peak Phase Jitter
T
Jø
PCIe Gen1 filter function
86
Spread Range
-0.5
0
%
Spread Rate
32
0
kHz
Duty Cycle
T
DC
45
50
55
%
Clock Stabilization from Power Up
3.5
ms
Rising Edge Rate
Note3, 4
0.6
4.0
V/ns
Falling Edge Rate
Note3, 4
0.6
4.0
V/ns
Rise-Fall Matching
Note3, 11
20%
Output Skew
T
OSKEW
V
T = 50%(measurement thresh-
old), Intra-pair skew
50
ps
V
T = 50%(measurement thresh-
old), Inter-pair skew
200
ps
Clock Source DC
Impedance(Zo)
Z
C-DC
17
Ω
High-Level Output
Voltage
V
OH
Note2 (Rs = 33ohm)
0.65
0.71
0.85
V
Low-Level Output Voltage
V
OL
-0.20
0
0.05
V
Absolute Crossing Point Voltage
V
CROSS
Note2, 5, 6
0.25
0.55
V
Variation of V
CROSS over all rising clock edges
V
CROSS
Delta
Note2, 5, 8
140
mV
Average Clock Period Accuracy
T
PERIOD
AVG
Note3, 9, 10
-300
2800
ppm
Absolute Period (including jitter and spread spectrum)
T
PERIOD
ABS
Note3, 7
9.847
10.203
ns
NOTE:1.Measured at the end of an 8-inch trace with a 5pF load.
2.Measurement taken from a single-ended waveform.
3.Measurement taken from a differential waveform.
4.Measured from -150 mV to +150 mV on the differential waveform. The signal is monotonic through the measurement region for rise and fall time. The 300 mV
measurement window is centered on the differential zero crossing.
5.Measured at crossing point where the instantaneous voltage value of the rising edge of 100M+ equals the falling edge 100M-.
6.Refers to the total variation from the lowest crossing point to the highest, regardless of which edge is crossing. Refers to all crossing points for this measurement.
7.Defines as the absolute minimum or maximum period. This includes cycle-to-cycle jitter, relative PPM tolerance, and spread spectrum modulation.
8.Defined as the total variation of all crossing voltages of rising 100M+ and falling 100M-.
9.Refer to section 4.3.2.1 of the PCI Express Base Specification, Revision 1.1 for information regarding PPM considerations.
10.PPM refers to parts per million and is a DC absolute period accuracy specification. 1 PPM is 1/1,000,000th of 100 MHz exactly or100 Hz. For 300 PPM there is an
error budget of 100Hz/PPM * 300 PPM = 30 kHz. The period is measured with a frequency counter with measurement window set at 100 ms or greater. With spread
spectrum turned off the error is less than ±300 ppm. With spread spectrum turned on there is an additional +2500 PPM nominal shift in maximum period resulting
from the -0.5% down spread.
11.Matching applies to rising edge rate for PCIe and falling edge rate for PCIeN. It is measured using a ±75 mV window centered on the median cross point where
14-0209



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