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2013-06-0002

PT0333-4

06/18/13

13

PT7C4563

Real-time Clock Module (I

c)

Starting and Stopping I

START condition, repeated START condition, and STOP condition



START condition

SDA level changes from high to low while SCL is at high level



STOP condition

SDA level changes from low to high while SCL is at high level



Repeated START condition (RESTART condition)

In some cases, the START condition occurs between a previous START condition and the next STOP condition, in which

case the second START condition is distinguished as a RESTART condition. Since the required status is the same as for the

START condition, the SDA level changes from high to low while SCL is at high level.

d)

Data Transfers and Acknowledge Responses during I



Data transfers

Data transfers are performed in 8-bit (1 byte) units once the START condition has occurred. There is no limit on the amount (bytes)

of data that are transferred between the START condition and STOP condition.

The address auto increment function operates during both write and read operations.

Updating of data on the transmitter (transmitting side)'s SDA line is performed while the SCL line is at low level.

The receiver (receiving side) captures data while the SCL line is at high level.

*Note with caution that if the SDA data is changed while the SCL line is at high level, it will be treated as a START, RESTART,

or STOP condition.

Fig.2 Starting and stopping on I