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TMS320C6743CPTP2 Datasheet(PDF) 32 Page - Texas Instruments

Part # TMS320C6743CPTP2
Description  Fixed- and Floating-Point Digital Signal Processor
PDF  151 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TMS320C6743CPTP2 Datasheet(HTML) 32 Page - Texas Instruments

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TMS320C6743
SPRS565D – APRIL 2009 – REVISED JUNE 2014
www.ti.com
Table 3-15. Multichannel Audio Serial Ports (McASPs) Terminal Functions (continued)
PIN NO
SIGNAL NAME
TYPE(1)
PULL(2)
MUXED
DESCRIPTION
PTP
ZKB
McASP1
AXR1[8]/EPWM1A/GP4[8]
168
M2
I/O
IPD
eHRPWM1 A, GPIO
AXR1[7]/EPWM1B/GP4[7]
169
M3
I/O
IPD
eHRPWM1 B, GPIO
AXR1[6]/EPWM2A/GP4[6]
170
M4
I/O
IPD
eHRPWM2 A, GPIO
AXR1[5]/EPWM2B/GP4[5]
171
N1
I/O
IPD
eHRPWM2 B, GPIO
AXR1[4]/EQEP1B/GP4[4]
173
N2
I/O
IPD
McASP1 serial data
eQEP, GPIO
AXR1[3]/EQEP1A/GP4[3]
174
P1
I/O
IPD
AXR1[2]/GP4[2]
175
P2
I/O
IPD
AXR1[1]/GP4[1]
176
R2
I/O
IPD
GPIO
AXR1[0]/GP4[0]
1
T3
I/O
IPD
McASP1 transmit
AHCLKX1/EPWM0B/GP3[14]
160
K2
I/O
IPD
eHRPWM0, GPIO
master clock
McASP1 transmit bit
ACLKX1/EPWM0A/GP3[15]
162
K3
I/O
IPD
eHRPWM0, GPIO
clock
McASP1 transmit
AFSX1/EPWMSYNCI/EPWMSYNCO/GP4[10]
163
K4
I/O
IPD
eHRPWM0, GPIO
frame sync
McASP1 receive
AHCLKR1/GP4[11]
-
L1
I/O
IPD
GPIO
master clock
McASP1 receive bit
ACLKR1/ECAP2/APWM2/GP4[12]
165
L2
I/O
IPD
eCAP2, GPIO
clock
McASP1 receive frame
AFSR1/GP4[13]
166
L3
I/O
IPD
GPIO
sync
eHRPWM0,
AMUTE1/EPWMTZ/GP4[14]
132
D4
O
IPD
eHRPWM1, GPIO,
McASP1 mute output
eHRPWM2
32
Device Overview
Copyright © 2009–2014, Texas Instruments Incorporated
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Product Folder Links: TMS320C6743



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