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EMC1186 Datasheet(PDF) 32 Page - Microchip Technology

Part # EMC1186
Description  Notebook Computers
PDF  43 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

EMC1186 Datasheet(HTML) 32 Page - Microchip Technology

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Dual Channel 1°C Temperature Sensor with Hardware Thermal Shutdown and 1.8V SMBus Communications
Datasheet
Revision 1.0 (07-11-13)
32
SMSC EMC1186
DATASHEET
6.9
Hardware Thermal Shutdown Limit Register 1Eh
This read only register returns the Hardware Thermal Shutdown Limit selected by the value of the pull-
up resistors on the ALERT and SYS_SHDN pins. The data represents the hardware set temperature
in °C using the active temperature setting set by the RANGE bit in the Configuration Register. See
Table 5.3, "Temperature Data Format" for the data format.
When the External Diode 1 Temperature exceeds this limit, the SYS_SHDN pin is asserted and will
remain asserted until the External Diode 1 Temperature drops below this limit minus 10°C.
6.10
Channel Mask Register 1Fh
The Channel Mask Register controls individual channel masking. When a channel is masked, the
ALERT pin will not be asserted when the masked channel reads a diode fault or out of limit error. The
channel mask does not mask the SYS_SHDN pin.
Bit 1 - EXTMASK - Masks the ALERT pin from asserting when the External Diode channel is out of
limit or reports a diode fault.
‘0’ (default) - The External Diode channel will cause the ALERT pin to be asserted if it is out of
limit or reports a diode fault.
‘1’ - The External Diode channel will not cause the ALERT pin to be asserted if it is out of limit or
reports a diode fault.
Bit 0 - INTMASK - Masks the ALERT pin from asserting when the Internal Diode temperature is out
of limit.
‘0’ (default) - The Internal Diode channel will cause the ALERT pin to be asserted if it is out of limit.
‘1’ - The Internal Diode channel will not cause the ALERT pin to be asserted if it is out of limit.
Table 6.10 Hardware Thermal Shutdown Limit Register
ADDR.
R/W
REGISTER
B7B6B5B4B3B2B1B0
DEFAULT
1Eh
R
Hardware
Thermal
Shutdown Limit
128
64
32
16
8
4
2
1
N/A
Table 6.11 Channel Mask Register
ADDR.
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
1Fh
R/W
Channel
Mask
-
---
-
-
EXT
MASK
INT
MASK
00h



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