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LM98725CCMT/NOPB Datasheet(PDF) 39 Page - Texas Instruments

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Part # LM98725CCMT/NOPB
Description  3 Channel, 16-Bit, 81 MSPS Analog Front End
PDF  145 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

LM98725CCMT/NOPB Datasheet(HTML) 39 Page - Texas Instruments

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LM98725
www.ti.com
SNAS474H – APRIL 2009 – REVISED MARCH 2015
7.4.12.7 General White Loop Operation
The White Peak value is determined by a moving window average done throughout the Active/White pixels
region of the line (Refer to LM98725 Typical Line Timing and Pixel Gain Regions). The size of the moving
window is set at Page 2, Register 4, Bits[2:0]. 4, 8, 16 or 32 (default) pixels are averaged together at a time and
compared with the previous Peak White value. If the new White Average is greater than the previous Peak White
value, then the Peak White value is set equal to the White Average. The window is then shifted over to the next
group of pixels (one window width) and a new average is calculated. This process is repeated until the
Active/White Pixels End value is reached. The final Peak White value is then compared with the White Target
value (Page 2, Register 5). The gain settings are then adjusted to make the Peak White value closer to the White
Target value.
7.4.12.8 White Loop Modes
•
White Full Calibration (Cold start or Pre-Job) - In this mode, the gain settings are completely reset to
default at the beginning of the loop. The first change or gain decision is whether the CDS/SH gain setting will
be 1x or 2x. Subsequent decisions are made to adjust the PGA setting to the provide the Peak White value
that is closest to the White Target value.
•
White Fine Tuning (Page Gap Calibration) - In this mode, the previous gain settings are used as the
starting point. The CDS/ SH gain setting will not be changed. The PGA gain will be increased or decreased
by one step at a time, to fine tune the gain. This mode is normally used where only minor changes in the
white level are expected.
7.4.12.9 Bimodal (Automatic) Correction
Due to the architecture of the ADC used in the LM98725, it is possible that a small offset in the resulting data will
be present between the Even and Odd pixels processed by the device. This offset is referred to as a Bimodal
distribution in the data. It can occur because the signals being procesed go through two different paths to
achieve the required throughput. Each of these paths can give a slightly different signal offset, resulting in the
bimodal distribution in output data, for a given fixed input voltage.
When the automatic Black Level (offset) correction circuit is engaged, a portion of that circuitry automatically
corrects the bimodal distribution. The bimodal correction applied is stored at Page 1, Registers 0x1Ch, 0x1Dh,
and 0x1Eh. The stored value is divided by two. Half is added to the Even pixels, and half is subtracted from the
Odd pixels.
Copyright © 2009–2015, Texas Instruments Incorporated
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