HM628128DLTS-7SL datasheet(7/20 Pages) HITACHI

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HM628128D Series

AC Characteristics (Ta = –20 to +70

°C, V

CC = 5.0 V ± 10%, unless otherwise noted.)

Test Conditions

• Input pulse levels: V

IL = 0.8 V, VIH = 2.4 V

• Input rise and fall time: 5 ns

• Input timing reference levels: 1.5 V

• Output timing reference level: 1.5 V

• Output load: 1 TTL Gate+ CL (100 pF) (HM628128D-7)

1 TTL Gate+ CL (50 pF) (HM628128D-5)

(Including scope and jig)

Read Cycle

HM628128D

-5

-7

Parameter

Symbol

Min

Max

Min

Max

Unit

Notes

Read cycle time

—

Address access time

—

Chip select access time

ACS1

—

ACS2

—

Output enable to output valid

—

Output hold from address change

—

Chip selection to output in low-Z

CLZ1

—

2, 3

CLZ2

—

2, 3

Output enable to output in low-Z

OLZ

—

2, 3

Chip deselection to output in high-Z

CHZ1

1, 2, 3

CHZ2

1, 2, 3

Output disable to output in high-Z

OHZ

1, 2, 3

HM628128DLTS-7SL Datasheet(PDF) 7 Page - Hitachi Semiconductor

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