DAC8544IPFB datasheet(2/20 Pages) TI

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ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

DAC8544

SLAS420 – MAY 2004

These devices have limited built-in ESD protection. The leads should be shorted together or the device

placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

AVAILABLE OPTIONS

PACKAGE DRAWING

PACKAGE

ORDERING

TRANSPORT

PRODUCT

PACKAGE

NUMBER

MARKING

NUMBER

MEDIA

DAC8544IPFB

Tray

DAC8544

48 - TQFP

PFB

-40

°C to 105°C

DAC8544I

DAC8544IPFBR

Tape and Reel

over operating free-air temperature range (unless otherwise noted)(1)

VDD to GND

–0.3 V to 6 V

IOVDD to IOGND

–0.3 V to 6 V

Digital input voltage to IOGND

–0.3 V to IOVDD + 0.3 V

VOUT to GND

–0.3 V to VDD + 0.3 V

Operating temperature range

–40

°C to 105°C

Storage temperature range, Tstg

–65

°C to 150°C

Junction temperature, TJ max

+150

°C

(1)

Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating

conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

DD = + 2.7 V to + 5.5 V; RL = 2 kΩ to GND; CL = 200 pF to GND; all specifications –40°C to +105°C unless otherwise noted

DAC8544

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

STATIC PERFORMANCE(1)

Resolution

Bits

Relative Accuracy

±0.025

±.098

%FSR

Differential Nonlinearity

16-Bit Monotonic

±0.25

±1

LSB

Measured at code 485, 25

°C

0.3

±3

Zero-Code Offset Error

Measured at code 485, -40

°C to 105°C

1.0

±5.0

Zero-Code Error Drift

All zeroes loaded to DAC register

-20

µV/°C

DC Crosstalk

0.1

LSB

AC Crosstalk

1-kHz sine wave

-110

Measured at code 64714, 25

°C

1.0

±3.0

Gain Error

Measured at code 64714, -40

°C to

2.0

±5.0

105

°C

Gain Error Drift

-5

ppm of

FSR/

°C

Measured at code 64714, 25

°C

0.5

±3.0

Full-Scale Error

Measured at code 64714, -40

°C to

1.0

±5.0

105

°C

OUTPUT CHARACTERISTICS(2)

Output Voltage Range

VREF

Output Voltage Settling Time

RL = 2 kΩ; CL <200 pF

µs

RL = 2 kΩ; CL <500 pF

Slew Rate

RL = 2 kΩ; CL <200 pF

µs

(1)

Linearity calculated using a reduced code range of 485 to 64714. Output unloaded.

(2)

Assured by design and characterization, not production tested.

DAC8544IPFB Datasheet(PDF) 2 Page - Texas Instruments

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