DP8344B datasheet(95/184 Pages) NSC

95 / 184 page

50 Device Specifications (Continued)

Signal

InOut

Reset

Description

State

513 DATA MEMORY INTERFACE

(Continued)

TimingControl

ALE

Out

ddress Latch Enable Demultiplexes AD bus Address should be latched on the

falling edge

READ

Out

Data memory READ strobe Data is latched on the rising edge

WRITE

Out

Data memory WRITE strobe Data is presented on the rising edge

514 TRANSCEIVER INTERFACE

DATA-IN

Logic level serial DATA INput

ALG-IN

Non-inverting AnaLoGINput for biphase serial data

ALG-IN

Inverting AnaLoGINput for biphase serial data

DATA-OUT

Out

Biphase serial DATA OUTput (inverted)

DATA-DLY

Out

Biphase serial DATA output DeLaYed by one-quarter bit time

TX-ACT

Out

ransmitter ACTive Normally low goes high to indicate serial data is being

transmitted Used to enable external line drive circuitry

515 REMOTE INTERFACE

RAE

emote Access Enable A ‘‘chip-select’’ input to allow host access of BCP

functions and memory

CMD

oMmanD input When high remote accesses are directed to the Remote

Interface Configuration register RIC

When low remote accesses are directed

to data-memory instruction-memory or program counter as determined by

RIC

REM-RD

REM

ote ReaD When active along with RAE a remote read cycle is requested

serviced by the BCP when the data bus becomes available

REM-WR

REM

ote WRite When active along with RAE a remote write cycle is requested

serviced by the BCP when the data bus becomes available

XACK

Out

Transfer ACKnowledge Normally high goes low on REM-RD or REM-WR going

low (if RAE low) returning high when the transfer is complete Normally used as

a ‘‘wait’’ signal to a remote processor

WR-PEND

Out

ite PENDing In a system configuration where remote write cycles are

latched indicates when the latches contain valid data which is yet to be serviced

by the BCP

LOCK

The remote processor uses this input to LOCK out local (BCP) accesses to data-

memory Once the remote processor has been granted the bus LOCK gives it

sole access to the bus and BCP accesses are ‘‘waited’’

LCL

Out

oCaL Normally low goes high when the BCP relinquishes the data and

address bus to service a Remote Access

516 EXTERNAL INTERRUPTS

BIRQ

InOut

i-directional Interrupt ReQuest As an input can be used as an active low

interrupt input (maskable and level-sensitive) As an output can be used to

generate remote system interrupts reset via RIC

NMI

on-Maskable Interrupt Negative edge sensitive interrupt input

DP8344B Datasheet(PDF) 95 Page - National Semiconductor (TI)

DP8344B Datasheet(HTML) 95 Page - National Semiconductor (TI)

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