DAC7724N datasheet(2/21 Pages) TI1

2 / 21 page

DAC7724, 7725

SPECIFICATION (DUAL SUPPLY)

At TA = –40°C to +85°C, VCC = +15V, VDD = +5V, VSS = –15V, VREFH = +10V, VREFL = –10V, unless otherwise noted.

The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes

no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change

without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant

any BURR-BROWN product for use in life support devices and/or systems.

DAC7724N, U

DAC7724NB, UB

DAC7725N, U

DAC7725NB, UB

PARAMETER

CONDITIONS

MIN

TYP

MAX

MIN

TYP

MAX

UNITS

ACCURACY

Linearity Error

±2

±1

LSB(1)

Linearity Matching(2)

±2

±1

LSB

Differential Linearity Error

±1

LSB

Monotonicity

TMIN to TMAX

Bits

Zero-Scale Error

Code = 000H

±2

LSB

Zero-Scale Drift

ppm/

°C

Zero-Scale Matching(2)

±2

±1

LSB

Full-Scale Error

Code = FFFH

±2

LSB

Full-Scale Matching(2)

±2

±1

LSB

Power Supply Sensitivity

At Full Scale

ppm / V

ANALOG OUTPUT

Voltage Output(3)

VREFL

VREFH

Output Current

±5

Load Capacitance

No Oscillation

500

Short-Circuit Current

±20

Short-Circuit Duration

To VSS, VCC, or GND

Indefinite

REFERENCE INPUT

VREFH Input Range

VREFL +1.25

+10

VREFL Input Range

–10

VREFH – 1.25

Ref High Input Current

–0.5

3.0

Ref Low Input Current

–3.5

DYNAMIC PERFORMANCE

Settling Time

±0.012%, 20V Output Step

µs

Channel-to-Channel Crosstalk

Full-Scale Step

0.25

LSB

Digital Feedthrough

nV-s

Output Noise Voltage

f = 10kHz

nV/

√Hz

DIGITAL INPUT/OUTPUT

Logic Family

TTL-Compatible CMOS

Logic Levels

VIH

IIH ≤ ±10µA

2.4

VDD +0.3

VIL

IIL ≤ ±10µA

–0.3

0.8

VOH

IOH = –0.8mA

3.6

VDD

VOL

IOL = 1.6mA

0.0

0.4

Data Format

Straight Binary

POWER SUPPLY REQUIREMENTS

VDD

+4.75

+5.25

VCC

+14.25

+15.75

VSS

–14.25

–15.75

IDD

µA

ICC

8.5

ISS

–8

–6

Power Dissipation

180

250

TEMPERATURE RANGE

Specified Performance

–40

+85

°C

NOTES: (1) LSB means Least Significant Bit, when VREFH equals +10V and VREFL equals –10V, then one LSB equals 4.88mV. (2) All DAC outputs will match within

the specified error band. (3) Ideal output voltage, does not take into account zero or full-scale error.

DAC7724N Datasheet(PDF) 2 Page - Texas Instruments

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