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LSJ689 Datasheet(PDF) 1 Page - Linear Integrated Systems |
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LSJ689 Datasheet(HTML) 1 Page - Linear Integrated Systems |
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1 / 6 page ![]() Linear Integrated Systems • 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261 Doc 201180 06/13/16 Rev#A7 ECN# LSJ689 FEATURES ULTRA LOW NOISE en = 2.0nV/ √Hz LOW INPUT CAPACITANCE Ciss = 8pF ABSOLUTE MAXIMUM RATINGS1 @ 25 °C (unless otherwise stated) Maximum Temperatures Storage Temperature -55 to +150°C Junction Operating Temperature -55 to +150°C Maximum Power Dissipation, TA = 25°C Continuous Power Dissipation, per side 4 300mW Power Dissipation, total 5 500mW Maximum Currents Gate Forward Current IG(F) = -10mA Maximum Voltages Gate to Source VGS = 50V Gate to Drain VGD = 50V Features Reduced Noise due to process improvement Monolithic Design High slew rate Low offset/drift voltage Low gate leakage lgss & lg High CMRR 102 dB Benefits Tight differential voltage match vs. current Improved op amp speed settling time accuracy Minimum Input Error trimming error voltage Lower intermodulation distortion Applications Wide band differential Amps High speed temperature compensated single ended input amplifier amps High speed comparators Impedance Converters Description The LSJ689 high performance, P-Channel, monolithic dual JFET features extremely low noise, tight offset voltage and low drift over temperature. It is targeted for use in a wide range of precision instrumentation applications. The SOT-23, TO-71 and SO-8 packages provide ease of manufacturing and the symmetrical pinouts prevent improper orientation. The SOT-23 and SO-8 packages are available in tape and reel, compatible with automatic assembly methods. (See packaging data) LSJ689 LOW NOISE LOW CAPACITANCE MONOLITHIC DUAL P-CHANNEL JFET AMPLIFIER PRELIMINARY SOIC-A TOP VIEW TO-71 TOP VIEW SOT-23 TOP VIEW Three Decades of Quality Through Innovation |
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