ESDA6V1-5W6

5/9

To have a good approximation of the remaining voltages at both Vi/o side, we provide the typical dynamical

resistance value Rd. By taking into account the following hypothesis :

Rg > Rd and Rload > Rd

we have:

Vin

V

R

V

R

br

d

g

g

=+

×

The results of the calculation done for Vg = 8 kV, Rg = 330

Ω (IEC 61000-4-2 standard), Vbr = 6.4 V (typ.)

and Rd = 0.61

Ω (typ.) give:

Vouput = 21.2 V

This confirms the very low remaining voltage across the device to be protected. It is also important to note

that in this approximation the parasitic inductance effect was not taken into account. This could be a few

tenths of volts during a few ns at the Vi/o side.

TEST BOARD

ESD

SURGE

16kV

Air

Discharge

Vi/o

E62

Fig. A2: Measurement conditions: