SA8028 datasheet(4/28 Pages) PHILIPS

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Philips Semiconductors

Product data

SA8028

2.5 GHz sigma delta fractional-N /

760 MHz IF integer frequency synthesizers

2002 Feb 22

VDD

SR02379

CLOCK

DATA

STROBE

RFin+

RFin–

REFin+

REFin–

IFin

TEST

LOAD SIGNALS

ADDRESS DECODER

2–BIT SHIFT

22–BIT SHIFT

CONTROL

LATCH

RF DIVIDER

REF DIVIDER

22 2 2

LATCH

IF DIVIDER

PHASE

DETECTOR

PHASE

DETECTOR

PUMP

BIAS

PUMP

CURRENT

SETTING

VDDCP

GND

6, 9

GNDCP

RSET

PHP

PHI

LOCK

PHA

PON

SIGMA-DELTA

GNDPre

VDDpre

LOCK

DETECT

Figure 2.

HBCC24 Block Diagram

HBCC24 PIN DESCRIPTION

SYMBOL

DESCRIPTION

VDDpre

Prescaler supply voltage

GND

Ground; digital

GNDPre

Prescaler ground; analog

RFin+

Input to RF divider (+)

RFin–

Input to RF divider (–)

GNDCP

Charge pump ground; analog

PHP

RF normal charge pump output

PHI

RF integral charge pump output

GNDCP

Charge pump ground; analog

PHA

IF charge pump output

IFin

Input to IF divider

N/C

Not connected

SYMBOL

DESCRIPTION

N/C

Not connected

VDDCP

Charge pump supply voltage; analog

RSET

External resistor from this pin to ground

sets the charge pump current

REFin–

Input to reference (–)

REFin+

Input to reference (+)

CLOCK

Programming bus clock input

DATA

Programming bus data input

STROBE

Programming bus enable input

PON

Power-down control input

LOCK

Lock detect output

TEST

Test (should be either grounded or

connected to VDD)

VDD

Supply; digital

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