LM3204

SNVS351C – JUNE 2005 – REVISED APRIL 2013

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MOSFET) synchronous rectifier on. In response, the inductor’s magnetic field collapses, generating a voltage

that forces current from ground through the synchronous rectifier to the output filter capacitor and load. As the

stored energy is transferred back into the circuit and depleted, the inductor current ramps down with a slope

when inductor current is going low, smoothing the voltage across the load.

The output voltage is regulated by modulating the PFET switch on time to control the average current sent to the

load. The effect is identical to sending a duty-cycle modulated rectangular wave formed by the switch and

synchronous rectifier at SW to a low-pass filter formed by the inductor and output filter capacitor. The output

voltage is equal to the average voltage at the SW pin.

PWM Mode

While in PWM (Pulse Width Modulation) mode, the output voltage is regulated by switching at a constant

frequency and then modulating the energy per cycle to control power to the load. Energy per cycle is set by

modulating the PFET switch on-time pulse width to control the peak inductor current. This is done by comparing

the PFET drain current to a slope-compensated reference current generated by the error amplifier. At the

beginning of each cycle, the clock turns on the PFET switch, causing the inductor current to ramp up. When the

current sense signal ramps past the error amplifier signal, the PWM comparator turns off the PFET switch and

turns on the NFET synchronous rectifier, ending the first part of the cycle. If an increase in load pulls the output

down, the error amplifier output increases, which allows the inductor current to ramp higher before the

comparator turns off the PFET. This increases the average current sent to the output and adjusts for the increase

in the load. The minimum on-time of PFET in PWM mode is 50ns (typ.).

Bypass Mode

The LM3204 contains an internal PFET switch for bypassing the PWM DC-DC converter during Bypass mode. In

Bypass mode, this PFET is turned on to power the PA directly from the battery for maximum RF output power.

Bypass mode is more efficient than operating in PWM mode at 100% duty cycle because the resistance of the

bypass PFET is less than the series resistance of the PWM PFET and inductor. This translates into higher

voltage available on the output in Bypass mode, for a given battery voltage. The part can be placed in bypass

mode by sending BYP pin high. This is called Forced Bypass Mode and it remains in bypass mode until BYP pin

goes low.

Alternatively the part can go into Bypass mode automatically. This is called Auto-bypass mode or Automatic

Bypass mode. The bypass switch turns on when the difference between the input voltage and programmed

output voltage is less than 250mV (typ.) for more than the bypass delay time of 15µs (typ.). The bypass switch

turns off when the input voltage is higher than the programmed output voltage by 450mV (typ.) for longer than

the bypass delay time. The bypass delay time is provided to prevent false triggering into Automatic Bypass mode

automatically when the input voltage gets close to the output voltage, typical scenario of a discharging battery. It

is also turned off automatically when the input voltage rises, typical scenario of a charger connected. Another

recommended to connect BYPOUT pin directly to the output capacitor with a separate trace and not to the FB

pin.

Operating Mode Selection Control

The BYP digital input pin is used to select between PWM/Auto-bypass and Bypass operating mode. Setting BYP

pin high (>1.2V) places the device in Forced Bypass mode. Setting BYP pin low (<0.4V) or leaving it floating

places the device in PWM/Auto-bypass mode.

Bypass and PWM operation overlap during the transition between the two modes. This transition time is

approximately 31µs when changing from PWM to Bypass mode, and 15µs when changing from Bypass to PWM

mode. This helps prevent under or overshoots during the transition period between PWM and Bypass modes.

Shutdown Mode

Setting the EN digital pin low (<0.4V) places the LM3204 in a 0.1µA (typ.) Shutdown mode. During shutdown, the

PFET switch, NFET synchronous rectifier, reference voltage source, control and bias circuitry of the LM3204 are

turned off. Setting EN high (>1.2V) enables normal operation.

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