LM3262 datasheet(21/41 Pages) TI1

21 / 41 page

LM3262

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SNVS875O – AUGUST 2012 – REVISED DECEMBER 2015

Layout Guidelines (continued)

10.1.3 Manufacturing Considerations

The LM3262 package employs a 9-pin, 3-mm × 3-mm array of 250 micron solder balls, with a 0.4-mm pad pitch.

The following simple design rules go a long way to ensuring a good layout:

•

The pad size must be 0.225 ± 0.02 mm, and the solder mask opening must be 0.325 ± 0.02 mm.

•

As a thermal relief, connect to each pad with 7-mil wide, 7-mil long traces, incrementally increasing each

trace to its optimal width. Symmetry is important to ensure the solder bumps re-flow evenly (refer to AN-1112

DSBGA Wafer Level Chip Scale Package (SNVA009)).

10.2 Layout Examples

Figure 29. Simplified LM3262 RF Evaluation Board Schematic

1. Bulk Input Capacitor C2 must be placed closer to LM3262 than C1.

2. Add a 1-nF (C1) on input of LM3262 for high frequency filtering.

3. Bulk Output Capacitor C3 must be placed closer to LM3262 than C4.

4. Add a 1-nF (C4) on output of LM3262 for high frequency filtering.

5. Connect both GND terminals of C1 and C4 directly to system GND layer of phone board.

6. Connect bumps SGND (A2), NC (B2), BPEN (C1) directly to System GND.

7. Use 0402 caps for both C2 and C3 due to better high frequency filtering characteristics over 0603 capacitors.

8. TI has seen some improvement in high-frequency filtering for small bypass caps (C1 and C4) when they are

connected to System GND instead of same ground as PGND. These capacitors should be 01005 case size

for minimum footprint and best high frequency characteristics.

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LM3262 Datasheet(PDF) 21 Page - Texas Instruments