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LM5160APWPR Datasheet(PDF) 6 Page - Texas Instruments |
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LM5160APWPR Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 28 page ![]() 6 LM5160A, LM5160 SNVSA03C – OCTOBER 2014 – REVISED AUGUST 2016 www.ti.com Product Folder Links: LM5160A LM5160 Submit Documentation Feedback Copyright © 2014–2016, Texas Instruments Incorporated (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report. 6.4 Thermal Information (1) THERMAL METRIC LM5160, LM5160A UNIT DNT (WSON) 12 PINS RθJA Junction-to-ambient thermal resistance(1) 33.4 °C/W RθJCbot Junction-to-case (bottom) thermal resistance (1) 1.9 °C/W ψJB Junction-to-board thermal characteristic parameter 11.3 °C/W RθJB Junction-to-board thermal resistance 11.1 °C/W RθJCtop Junction-to-case (top) thermal resistance 24.7 °C/W ψJT Junction-to-top thermal characteristic parameter 0.2 °C/W 6.5 Electrical Characteristics Typical values correspond to TJ = 25°C. Minimum and maximum limits apply over TJ = –40°C to 125°C (1)(2) for the LM5160, LM5160A . Unless otherwise stated, VIN = 24 V. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SUPPLY CURRENT ISD Input shutdown current VIN = 24 V, EN/UVLO = 0 V 50 90.7 µA IOP Input operating current VIN = 24 V, FB = 3 V, non-switching 2.3 2.84 mA VCC SUPPLY VCC Bias regulator output VIN = 24 V, ICC = 20 mA 6.47 7.5 8.52 V VCC Bias regulator current limit VIN = 24 V 30 mA VCC(UV) VCC undervoltage threshold VCC rising 3.98 4.1 V VCC(HYS) VCC undervoltage hysteresis VCC falling 185 mV VCC(LDO) VIN – VCC dropout voltage VIN = 4.5 V, ICC = 20 mA 165 260 mV HIGH-SIDE FET RDS(ON) High-side ON-resistance V(BST - SW) = 7 V, ISW = 1 A 0.29 Ω BST(UV) Bootstrap gate drive UV V(BST - SW) rising 2.93 3.6 V BST(HYS) Gate drive UV hysteresis V(BST - SW) falling 200 mV LOW-SIDE FET RDS(ON) Low-side ON-resistance ISW = 1 A 0.13 Ω HIGH-SIDE CURRENT LIMIT ILIM (HS) High-side current limit threshold 2.125 2.5 2.875 A TRES Current limit response time ILIM (HS) threshold detect to FET turnoff 100 ns TOFF1 Current limit forced OFF-time FB = 0 V, VIN = 65 V 17.31 29 39.8 µs TOFF2 Current limit forced OFF-time FB = 1 V, VIN = 24 V 2.18 3.5 5.12 µs LOW-SIDE CURRENT LIMIT ISOURCE(LS) Sourcing current limit 1.9 2.5 3 A ISINK(LS) Sinking current limit 5.4 A DIODE EMULATION VFPWM(LOW) FPWM input logic low VIN = 24 V 1 V VFPWM(HIGH) FPWM input logic high VIN = 24 V 3 V IZX Zero cross detect current FPWM = 0 (diode emulation) 0 mA REGULATION COMPARATOR VREF FB regulation level VIN = 24 V (12-pin WSON) 1.977 2 2.017 V I(Bias) FB input bias current VIN = 24 V 100 nA |
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