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LP2996A

SNOSCY7 – JUNE 2014

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Typical Application (continued)

8.2.3 DDR-II Applications

With the separate VDDQ pin and an internal resistor divider it is possible to use the LP2996A in applications

utilizing DDR-II memory. Figure 24 and Figure 25 show several implementations of recommended circuits with

output curves displayed in the Typical Performance Characteristics. Figure 24 shows the recommended circuit

configuration for DDR-II applications. The output stage is connected to the 1.8 V rail and the AVIN pin can be

connected to either a 3.3 V or 5 V rail. For DDR-III and DDR-III low power designs in wider temperature

applications, the LP2998/Q is recommended.

Figure 21. Recommended DDR-II Termination

If it is not desirable to use the 1.8 V rail it is possible to connect the output stage to a 3.3 V rail. Care should be

output voltages. For this reason it is not recommended to power PVIN off a rail higher than the nominal 3.3 V.

The advantage of this configuration is that it has the ability to source and sink a higher maximum continuous

current.

Figure 22. DDR-II Termination with Higher Voltage Rails

8.2.4 SSTL-2 Applications

For the majority of applications that implement the SSTL-2 termination scheme it is recommended to connect all

the input rails to the 2.5 V rail. This provides an optimal trade-off between power dissipation and component

count and selection. An example of this circuit can be seen in Figure 23.

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