TMS320VC5503 datasheet(21/126 Pages) TI1

21 / 126 page

Introduction

April 2004 − Revised January 2008

SPRS245J

Table 2−3. Signal Descriptions (Continued)

TERMINAL

NAME

RESET

CONDITION

BK‡

FUNCTION

I/O/Z†

MULTIPLEXED

SIGNAL NAME

PARALLEL BUS (CONTINUED)

I/O/Z

EMIF byte enable 0 control or HPI byte identification. This pin serves in one

of two functions: EMIF byte enable 0 control (EMIF.BE0) or HPI byte

identification (HPI.HBE0). The initial state of this pin depends on the

GPIO0 pin. See Section 3.5.1 for more information.

GPIO0 = 1:

Output,

EMIF.BE0

O/Z

Active-low EMIF byte enable 0 control. EMIF.BE0 is selected when the

Parallel Port Mode bit field of the External Bus Selection Register is set to

00 or 01.

EMIF.BE0

GPIO0 = 0:

Input,

HPI.HBE0

HPI byte identification. This pin, in conjunction with HPI.HBE1, identifies

the first or second byte of the transfer. HPI.HBE0 is selected when the

Parallel Port Mode bit field is set to 10 or 11.

Input,

HPI.HBE0

I/O/Z

EMIF byte enable 1 control or HPI byte identification. This pin serves in one

of two functions: EMIF byte enable 1 control (EMIF.BE1) or HPI byte

identification (HPI.HBE1). The initial state of this pin depends on the

GPIO0 pin. See Section 3.5.1 for more information.

GPIO0 = 1:

Output,

EMIF.BE1

O/Z

Active-low EMIF byte enable 1 control. EMIF.BE1 is selected when the

Parallel Port Mode bit field of the External Bus Selection Register is set to

00 or 01.

EMIF.BE1

GPIO0 = 0:

Input,

HPI.HBE1

HPI byte identification. This pin, in conjunction with HPI.HBE0, identifies

the first or second byte of the transfer. HPI.HBE1 is selected when the

Parallel Port Mode bit field is set to 10 or 11.

Input,

HPI.HBE1

C10

I/O/Z

EMIF SDRAM row strobe, HPI address strobe, or general-purpose IO12.

This pin serves in one of three functions: EMIF SDRAM row strobe

(EMIF.SDRAS), HPI address strobe (HPI.HAS), or general-purpose IO12

(GPIO12). The initial state of this pin depends on the GPIO0 pin. See

Section 3.5.1 for more information.

GPIO0 = 1:

Output,

EMIF.SDRAS

O/Z

Active-low EMIF SDRAM row strobe. EMIF.SDRAS is selected when the

Parallel Port Mode bit field of the External Bus Selection Register is set to

00 or 01.

Output,

EMIF.SDRAS

GPIO0 = 0:

HPI.HAS

Active-low HPI address strobe. This signal latches the address in the HPIA

Parallel Port Mode bit field is set to 11.

GPIO0 = 0:

Input,

HPI.HAS

GPIO12

I/O/Z

General-purpose IO12. GPIO12 is selected when the Parallel Port Mode

bit field is set to 10.

† I = Input, O = Output, S = Supply, Hi-Z = High-impedance

‡ BK = bus keeper (the bus keeper maintains the previous voltage level during reset or while the output pin is not driven), PU = pullup,

PD = pulldown, H = hysteresis input buffer, FS = fail-safe buffer

TMS320VC5503 Datasheet(PDF) 21 Page - Texas Instruments

TMS320VC5503 Datasheet(HTML) 21 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL