MCP2050 datasheet(20/40 Pages) MICROCHIP

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MCP2050

DS20002299C-page 20

 2012-2014 Microchip Technology Inc.

Microcontroller Interface

High-Level Input Voltage

(TXD, FAULT/TXE,

WWDTTRIG)

VIH

2.0

—

VREG

+0.3

Low-Level Input Voltage

(TXD, FAULT/TXE,

WWDTTRIG)

VIL

-0.3

—

0.8

High-Level Input Current

(TXD, FAULT/TXE,

WWDTTRIG)

IIH

-2.5

—

0.4

µA

Input voltage = 4.0V.

~800 kΩ internal adaptive

pull-up

Low-Level Input Current

(TXD, FAULT/TXE,

WWDTTRIG)

IIL

-10

—

µA

Input voltage = 0.5V.

~800 kΩ internal adaptive

pull-up

High-Level Input Voltage

(CS/LWAKE)

VIH

2.0

—

VBB

Through a current-limiting

resistor

Low-Level Input Voltage

(CS/LWAKE)

VIL

-0.3

—

0.8

High-Level Input Current

(CS/LWAKE)

IIH

——

8.0

µA

Input voltage = 0.8VREG

~1.3 MΩ internal pull-

down to VSS

Low-Level Input Current

(CS/LWAKE)

IIL

——

5.0

µA

Input voltage = 0.2VREG

~1.3 MΩ internal pull-

down to VSS

Low-Level Output Voltage

(RXD)

VOLRXD

——

0.2VREG

VIOL = 2 mA

High-Level Output Voltage

(RXD)

VOHRXD

0.8VREG

——

IOH = 2 mA

Low-Level Output Voltage

(FAULT/TXE)

VOLOD

—1.0

IOL = 4 mA

Low-Level Output Voltage

(RESET)

VOLRST

——

1.0

IOL = 4 mA

2.3

DC Specifications (Continued)

DC Specifications

Electrical Characteristics:

Unless otherwise indicated, all limits are specified for:

VBB = 6.0V to 18.0V, TA = -40°C to +125°C

CREG = 10 µF

Parameter

Sym.

Min.

Typ.

Max.

Units

Conditions

Note 1:

Internal current limited. 2.0 ms maximum recovery time (RLBUS = 0Ω, TX = 0, VLBUS = VBB).

Characterized, not 100% tested.

In Power-Down mode, normal LIN recessive/dominant threshold is disabled; VWK(LBUS) is used to detect

bus activities.

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