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OPA842IDBVT Datasheet(PDF) 14 Page - Texas Instruments

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Part # OPA842IDBVT
Description  Wideband, Low Distortion, Unity-Gain Stable, Voltage-Feedback OPERATIONAL AMPLIFIER
PDF  19 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

OPA842IDBVT Datasheet(HTML) 14 Page - Texas Instruments

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OPA842
14
SBOS267A
www.ti.com
21MHz bandwidth shown in the Electrical Characteristics
agrees with that predicted using the simple formula and the
typical GBP of 200MHz.
OUTPUT DRIVE CAPABILITY
The OPA842 has been optimized to drive the demanding load
of a doubly-terminated transmission line. When a 50
Ω line is
driven, a series 50
Ω into the cable and a terminating 50Ω load
at the end of the cable are used. Under these conditions, the
cable’s impedance will appear resistive over a wide frequency
range, and the total effective load on the OPA842 is 100
Ω in
parallel with the resistance of the feedback network. The
electrical characteristics show a +2.8V/–3.3V swing into this
load—which will then be reduced to a +1.4V/–1.65V swing at
the termination resistor. The
±90mA output drive over tem-
perature provides adequate current drive margin for this load.
Higher voltage swings (and lower distortion) are achievable
when driving higher impedance loads.
A single video load typically appears as a 150
Ω load (using
standard 75
Ω cables) to the driving amplifier. The OPA842
provides adequate voltage and current drive to support up to
three parallel video loads (50
Ω total load) for an NTSC
signal. With only one load, the OPA842 achieves an excep-
tionally low 0.003%/0.008
° dG/dP error.
DRIVING CAPACITIVE LOADS
One of the most demanding, and yet very common, load
conditions for an op amp is capacitive loading. A high-speed,
high open-loop gain amplifier like the OPA842 can be very
susceptible to decreased stability and closed-loop response
peaking when a capacitive load is placed directly on the
output pin. In simple terms, the capacitive load reacts with
the open-loop output resistance of the amplifier to introduce
an additional pole into the loop and thereby decrease the
phase margin. This issue has become a popular topic of
application notes and articles, and several external solutions
to this problem have been suggested. When the primary
considerations are frequency response flatness, pulse re-
sponse fidelity, and/or distortion, the simplest and most
effective solution is to isolate the capacitive load from the
feedback loop by inserting a series isolation resistor between
the amplifier output and the capacitive load. This does not
eliminate the pole from the loop response, but rather shifts it
and adds a zero at a higher frequency. The additional zero
acts to cancel the phase lag from the capacitive load pole,
thus increasing the phase margin and improving stability.
The Typical Characteristics show the recommended “RS vs
Capacitive Load” and the resulting frequency response at the
load. The criterion for setting the recommended resistor is
maximum bandwidth, flat frequency response at the load.
Since there is now a passive low-pass filter between the
output pin and the load capacitance, the response at the
output pin itself is typically somewhat peaked, and becomes
flat after the roll-off action of the RC network. This is not a
concern in most applications, but can cause clipping if the
desired signal swing at the load is very close to the amplifier’s
swing limit. Such clipping would be most likely to occur in
pulse response applications where the frequency peaking is
manifested as an overshoot in the step response.
Parasitic capacitive loads greater than 2pF can begin to
degrade the performance of the OPA842. Long PC board
traces, unmatched cables, and connections to multiple de-
vices can easily cause this value to be exceeded. Always
consider this effect carefully, and add the recommended
series resistor as close as possible to the OPA842 output pin
(see Board Layout section).
DISTORTION PERFORMANCE
The OPA842 is capable of delivering an exceptionally low
distortion signal at high frequencies and low gains. The
distortion plots in the Typical Characteristics show the typical
distortion under a wide variety of conditions. Most of these
plots are limited to 100dB dynamic range. The OPA842’s
distortion does not rise above –100dBc until either the signal
level exceeds 0.5V and/or the fundamental frequency ex-
ceeds 500kHz. Distortion in the audio band is
≤ –120dBc.
Generally, until the fundamental signal reaches very high
frequencies or powers, the 2nd-harmonic will dominate the
distortion with a negligible 3rd-harmonic component. Focus-
ing then on the 2nd-harmonic, increasing the load imped-
ance improves distortion directly. Remember that the total
load includes the feedback network—in the noninverting
configuration this is the sum of RF + RG, whereas in the
inverting configuration this is just RF (see Figure 1). Increas-
ing the output voltage swing increases harmonic distortion
directly. Increasing the signal gain will also increase the 2nd-
harmonic distortion. Again, a 6dB increase in gain will in-
crease the 2nd- and 3rd-harmonic by 6dB even with a
constant output power and frequency. Finally, the distortion
increases as the fundamental frequency increases due to the
roll off in the loop gain with frequency. Conversely, the
distortion will improve going to lower frequencies down to the
dominant open-loop pole at approximately 600Hz. Starting
from the –100dBc 2nd-harmonic for 2Vp-p into 200
Ω, G = +2
distortion at 1MHz (from the Typical Characteristics), the
2nd-harmonic distortion at 20kHz should be approximately:
–100dB – 20log (1MHz/20kHz) = –134dBc
The OPA842 has an extremely low 3rd-order harmonic distor-
tion. This also gives an exceptionally good 2-tone, 3rd-order
intermodulation intercept, as shown in the Typical Character-
istics. This intercept curve is defined at the 50
Ω load when
driven through a 50
Ω-matching resistor to allow direct com-
parisons to RF MMIC devices. This network attenuates the
voltage swing from the output pin to the load by 6dB. If the
OPA842 drives directly into the input of a high-impedance
device, such as an ADC, this 6dB attenuation is not taken.
Under these conditions, the intercept will increase by a mini-
mum 6dBm. The intercept is used to predict the intermodulation
spurious for two closely spaced frequencies. If the two test
frequencies, f1 and f2, are specified in terms of average and
delta frequency, fO = (f1 + f2)/2 and ∆f = |f2 – f1|/2, the two 3rd-
order, close-in spurious tones will appear at fO ± (3 • ∆f). The
difference between the two equal test-tone power levels and
these intermodulation spurious power levels is given by



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