P89C668 datasheet(52/89 Pages) PHILIPS

52 / 89 page

Philips Semiconductors

Product data

P89C660/P89C662/P89C664/

P89C668

80C51 8-bit Flash microcontroller family

16KB/32KB/64KB ISP/IAP Flash with 512B/1KB/2KB/8KB RAM

2002 Oct 28

Reduced EMI Mode

The AO bit (AUXR.0) in the AUXR register when set disables the

ALE output.

Reduced EMI Mode

AUXR (8EH)

–

EXTRAM

AUXR.1

EXTRAM

(See more detailed description in

AUXR.0

Figure 53.)

Dual DPTR

The dual DPTR structure (see Figure 39) is a way by which the chip

will specify the address of an external data memory location. There

are two 16-bit DPTR registers that address the external memory,

and a single bit called DPS (AUXR1.0), that allows the program

code to switch between them.

• New Register Name: AUXR1#

• SFR Address: A2H

• Reset Value: xxxxx0x0B

AUXR1 (A2H)

43210

–

ENBOOT

–

GF2

–

DPS

Where:

DPS (AUXR1.0), enables switching between DPTR0 and DPTR1.

Select Reg

DPS

DPTR0

DPTR1

The DPS bit status should be saved by software when switching

between DPTR0 and DPTR1.

The GF2 bit is a general purpose user-defined flag. Note that bit 2 is

not writable and is always read as a zero. This allows the DPS bit to

be quickly toggled simply by executing an INC AUXR1 instruction

without affecting the GF2 bit.

The ENBOOT bit determines whether the BOOTROM is enabled

or disabled. This bit will automatically be set if the status byte is

non zero during reset or PSEN is pulled low, ALE floats high, and

EA > VIH on the falling edge of reset. Otherwise, this bit will be

cleared during reset.

DPS

DPTR1

DPTR0

DPH

(83H)

DPL

(82H)

EXTERNAL

DATA

MEMORY

SU00745A

BIT0

AUXR1

Figure 39.

DPTR Instructions

The instructions, that refer to DPTR, refer to the data pointer that is

currently selected by the DPS bit (AUXR1.0). The six instructions

that use the DPTR are as follows:

INC DPTR

Increments the data pointer by 1

MOV DPTR, #data16

Loads the DPTR with a 16-bit constant

MOV A, @ A+DPTR

Move code byte relative to DPTR to ACC

MOVX A, @ DPTR

Move external RAM (16-bit address) to

ACC

MOVX @ DPTR , A

Move ACC to external RAM (16-bit

address)

JMP @ A + DPTR

Jump indirect relative to DPTR

The data pointer can be accessed on a byte-by-byte basis by

specifying the low or high byte in an instruction which accesses the

SFRs. See application note AN458 for more details.

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