2003 Apr 29

8

Philips Semiconductors

Product specification

Triple 8-bit video Digital-to-Analog

Converter (DAC)

TDF8771A

Notes

1. Minimum and maximum data of current and power consumption are measured in worse case conditions: for

minimum data, all digital inputs are at logic level 0 while for maximum data, all digital inputs are at logic level 1.

Table 1

Input coding and DAC output voltages (typical values)

INL

integral non-linearity

ramp input

−±0.3

±1

LSB

DNL

differential non-linearity

ramp input

−±0.15 ±0.5

LSB

α

ct

crosstalk DAC to DAC

−50

−−

dB

DAC to DAC matching

−

1.0

2.8

%

Switching characteristics (for 1 k

Ω output load); see Fig.4

input to 50% output delay time

full-scale change

−

12

−

ns

settling time

10% to 90% of full-scale change

−

15

−

ns

settling time

to

±1 LSB

−

50

−

ns

Output transients (glitches)

area for 1 LSB change

−

1

−

LSB

⋅ns

BINARY INPUT DATA (SYNC = BLANK = 0)

CODE

DAC OUTPUT VOLTAGES (V)

OUTB, OUTR, OUTG

0000 0000

0

0.262

0000 0001

1

0.273

to

to

to

1000 0000

128

1.731

to

to

to

1111 1110

254

3.188

1111 1111

255

3.200

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT