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CDCFR83 Datasheet(PDF) 2 Page - Texas Instruments |
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CDCFR83 Datasheet(HTML) 2 Page - Texas Instruments |
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2 / 12 page ![]() CDCFR83 DIRECT RAMBUS CLOCK GENERATOR SCAS665A – APRIL 2001 REVISED MARCH 2002 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 functional block diagram Bypass MUX Test MUX B A PLL Phase Aligner PACLK PLLCLK ByPCLK CLK CLKB REFCLK φD SYNCLKN PCLKM MULT0 MULT1 2 PWRDWNB S0 S1 S2 STOPB FUNCTION TABLE† MODE S0 S1 S2 CLK CLKB Normal 0 0 0 Phase aligned clock Phase aligned clock B Bypass 1 0 0 PLLCLK PLLCLKB Test 1 1 0 REFCLK REFCLKB Output test (OE) 0 1 X Hi-Z Hi-Z Reserved 0 0 1 — — Reserved 1 0 1 — — Reserved 1 1 1 Hi-Z Hi-Z † X = don’t care, Hi-Z = high impedance |
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