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TSB81BA3IPFPEP Datasheet(PDF) 12 Page - Texas Instruments |
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TSB81BA3IPFPEP Datasheet(HTML) 12 Page - Texas Instruments |
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12 / 61 page  TSB81BA3D, TSB81BA3DI IEEE 1394b THREE-PORT CABLE TRANSCEIVER/ARBITER SLLS559E − DECEMBER 2002 − REVISED JUNE 2006 12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 electrical characteristics over recommended ranges of operating conditions (unless otherwise noted) driver PARAMETER TEST CONDITION MIN TYP MAX UNIT VOD Differential output voltage 56 Ω, See Figure 1 172 265 mV IDIFF Driver difference current, TPA+, TPA−, TPB+, TPB− Drivers enabled, speed signaling off −1.05† 1.05† mA ISP200 Common-mode speed signaling current, TPB+, TPB− S200 speed signaling enabled −4.84‡ −2.53‡ mA ISP400 Common-mode speed signaling current, TPB+, TPB− S400 speed signaling enabled −12.4‡ −8.10‡ mA VOFF Off state differential voltage Drivers disabled, See Figure 1 20 mV † Limits defined as algebraic sum of TPA+ and TPA− driver currents. Limits also apply to TPB+ and TPB− algebraic sum of driver currents. ‡ Limits defined as absolute limit of each of TPB+ and TPB− driver currents. receiver PARAMETER TEST CONDITION MIN TYP MAX UNIT Z Differential impedance Drivers disabled 4 7 k Ω ZID Differential impedance Drivers disabled 4 pF Z Common mode impedance Drivers disabled 20 k Ω ZIC Common-mode impedance Drivers disabled 24 pF VTH−R Receiver input threshold voltage Drivers disabled −30 30 mV VTH−CB Cable bias detect threshold, TPBx cable inputs Drivers disabled 0.6 1.0 V VTH+ Positive arbitration comparator threshold voltage Drivers disabled 89 168 mV VTH− Negative arbitration comparator threshold voltage Drivers disabled −168 −89 mV VTH−SP200 Speed signal threshold TPBIAS−TPA common mode 49 131 mV VTH−SP400 Speed signal threshold voltage, drivers disabled 314 396 mV device PARAMETER TEST CONDITION MIN TYP MAX UNIT I Supply current, 3.3 VDD See Note 2 120 mA IDD Supply current, Core VDD See Note 2 79 mA VTH Power status threshold, CPS input† 400-k Ω resistor† 4.7 7.5 V VOH High-level output voltage, CTL0, CTL1, D0−D7, CNA, LKON/DS2, PCLK outputs VDD = 3 to 3.6 V, IOH = −4 mA 2.8 V VOL Low-level output voltage, CTL0, CTL1, D0−D7, CNA, LKON/DS2, PCLK outputs IOL = 4 mA 0.4 V IBH+ Positive peak bus holder current, D0−D7, CTL0−CTL1, LREQ VDD = 3.6 V, VI = 0 V to VDD 0.05 1 mA IBH− Negative peak bus holder current, D0−D7, CTL0−CTL1, LREQ VDD = 3.6 V, VI = 0 V to VDD −1.0 −0.05 mA IOZ Off-state output current, CTL0, CTL1, D0−D7, LKON/DS2 I/Os VO = VDD or 0 V ±5 μA IIRST Pullup current, RESETz input VI = 1.5 V or 0 V −90 −20 μA VO TPBIAS output voltage At rated IO current 1.665 2.015 V † Measured at cable power side of resistor. ‡ This parameter applicable only when ISO low. NOTE 2: Repeat Max Packet (1 port receiving maximum size isochronous packet—8192 bytes, sent on every isochronous interval, s800, data value of 0xCCCCCCCCh; 2 ports repeating; all ports with beta-mode connection), VDD3.3 = 3.3 V, VDDCORE = 1.95 V, TA = 25_C |
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