RT9238CS datasheet(9/24 Pages) ETC

9 / 24 page

Preliminary

RT9238

DS9238-01 July 2001

www.richtek-ic.com.tw

Functional Pin Description

DRIVE2 (Pin 1)

Connect this pin to the gate of an external MOSEFT.

This pin provides the drive for the VTT (VOUT2)

regulator’s pass transistor.

FIX (Pin 2)

Grounding this pin bypasses the internal resistor

dividers that set the voltage of the 1.5V and 1.8V

linear regulators. This way, the output voltage of the

two regulators can be adjusted from 1.26V up to the

input voltage (+3.3V or +5V) by way of an external

resistor divider corrected at the corresponding VSEN

pin. The new output voltage set by the external

resistor divider can be determined using the following

formula:

ROUT

VOUT = 1.265V x (1+

RGND

)

Where ROUT is the resistor connected from VSEN to

the output of the regulator, and RGND is the resistor

connected from VSEN to ground. Left open, this pin

is pulled high enabling fixed output voltage operation.

VID25, VID0, VID1, VID2, VID3 (Pin 7, 6, 5, 4, and 3)

VID3-25 are TTL-compatible the input pins to the 5-

bit DAC. The state logic of these five pins program

the internal voltage reference, DACOUT. The level of

DACOUT sets the microprocessor core converter

output voltage, as well as the corresponding PGOOD

and OVP thresholds. Table 1 specifies the DACOUT

voltage of 32 combinations of VID levels.

PGOOD (Pin 8)

PGOOD is an open collector output used to indicate

the status of the PWM converter output voltage. This

pin is pulled low when the synchronous regulator

output is not within

±10% of the DACOUT reference

voltage, or when any of the other outputs are below

their under-voltage thresholds.

VTTPG (Pin 9)

VTTPG is an open collector output used to indicate

the status of the VTT (VOUT2) regulator output

voltage. This pin is pulled low when the output

voltage is below 1.08V under-voltage threshold or

when SS13 pin is below 1.25V.

FAULT/VID4 (Pin 10)

This pin provides two combined functions. One is

fault condition indicator, the other is VID4 for

VRM8.4 DAC (see the Table I). Pull up this pin up to

over 2V, it act like the VID4 of VRM8.4. When this

pulled

high,

the

DACOUT

provide

1.890V~2.090V output voltages.

Nominally, the voltage at this pin is pulled low by a

internal 47k

Ω, in the event of an over-voltage or

over-current condition, this pin is internally pulled to

about 8V (VCC = 12V).

VSEN2 (Pin 11)

Connect this pin to the output of the VTT (VOUT2)

linear regulator. This pin is also monitored for under-

voltage events.

SS24 (Pin 12)

Connect a capacitor from this pin to ground. This

capacitor, along with an internal 28

µA (VSS24>1V)

current source, sets the soft-start interval of the

VOUT2 regulator. Pulling this pin below 0.8V induces

a chip reset and shutdown.

SS13 (Pin 13)

Connect a capacitor from this pin to ground. This

capacitor, along with an internal 28

µA (VSS13>1V)

current source, sets the soft-start interval of the

synchronous PWM converter (VOUT1) and the AGP

regulator (VOUT3). A VTTPG high signal is also

delayed by the time interval required by the charging

of this capacitor from 0V to 1.25V.

VSEN4 (Pin 14)

Connect this pin to the output of the 1.8V regulator.

This pin is monitored for under-voltage events.

DRIVE4 (Pin 15)

Connect this pin to the gate of an external MOSEFT.

This pin provides the drive for the 1.8V regulator’s

pass transistor.

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