RT9238CS datasheet(13/24 Pages) ETC

13 / 24 page

Preliminary

RT9238

DS9238-01 July 2001

www.richtek-ic.com.tw

MOSFET’s on-resistance, RDS(ON) to monitor the

current for protection against a shorted output. All

linear regulators monitor their respective VSEN pins

for under-voltage to protect against excessive

currents.

Fig.5 illustrates the over-current protection with an

overload on OUT1. The overload is applied at T0 and

the current increases through the inductor (LOUT1). At

time T1, the OC1 comparator trips when the voltage

across

(iD•RDS(ON))

exceeds

the

level

programmed by ROCSET . This inhibits outputs 1, 2,

and 3, discharges the soft-start capacitor CSS24 with

µA current sink, and increments the counter. Soft-

start capacitor CSS13 is quickly discharged. CSS13

starts ramping up at T2 and initiates a new soft-start

cycle. With OUT2 still overloaded, the inductor

current increases to trip the over-current comparator.

Again, this inhibits the outputs, but the CSS24 soft-

start voltage continues increasing to above 4.0V

before discharging. Soft-start capacitor CSS13 is,

again, quickly discharged. The counter increments to

2. The soft-start cycle repeats at T3 and trips the

over-current comparator. The SS24 pin voltage

increases to above 4.0V at T4 and the counter

increments to 3. This sets the fault latch to disable

the converter.

Fig.5 Over-current Operation

The three linear controllers monitor their respective

VSEN pins for under-voltage. Should excessive

currents cause VSEN3 or VSEN4 to fall below the

linear under-voltage threshold, the respective UV

signals set the OC latch or the FAULT latch,

providing respective

CSS capacitors are fully

charged. Blanking the UV signals during the CSS

charge interval allows the linear outputs to build

above the under-voltage threshold during normal

operation. Cycling the bias input power off then on

resets the counter and the fault latch.

An external resistor (ROCSET) programs the over-

current trip level for the PWM converter. As shown in

Fig.6, the internal 200

µA current sink (IOCSET)

develops a voltage across ROCSET (VSET) that is

referenced to VIN. The DRIVE signal enables the

over-current comparator (OC). When the voltage

across the upper MOSFET (VDS(ON)) exceeds VSET,

the over-current comparator trips to set the over-

current latch. Both VSET and VDS are referenced to

VIN and a small capacitor across ROCSET helps

VOCSET track the variations of VIN due to MOSFET

switching. The over-current function will trip at a peak

inductor current (IPEAK) determined by:

The OC trip point varies with MOSFET’s RDS(ON)

temperature variations. To avoid over-current tripping

in the normal operating load range, determine the

ROCSET resistor value from the equation above

with:

1. The maximum RDS(ON) at the highest junction

temperature

2. The minimum IOCSET from the specification table

3. Determine IPEAK for IPEAK > IOUT(MAX) + (

∆I)/ 2,

where

∆I is the output inductor ripple current.

For an equation for the ripple current see the section

under component guidelines titled ‘Output Inductor

Selection’.

)

(

OCSET

PEAK

10V

T0T1

T3T4

TIME

FAULT

REPORTED

COUNT = 1 COUNT = 2 COUNT = 3

OVERLOAD

APPLIED

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