DS2164Q datasheet(4/17 Pages) DALLAS

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DS2164Q Datasheet(PDF) 4 Page - Dallas Semiconductor

Part #	DS2164Q

Description	G.726 ADPCM Processor

PDF	17 Pages

Scroll/Zoom	100%

Manufacturer	DALLAS [Dallas Semiconductor]

Direct Link	https://www.maximintegrated.com/en.html

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4 / 17 page

DS2164Q

4 of 17

Figure 1. BLOCK DIAGRAM

Figure 2. SERIAL PORT WRITE

Note: A 2-byte write is shown.

The bypass feature is enabled when BYP is set and IPD is cleared. During bypass, no expansion or

compression occurs. Bypass operates on bytewide (8 bits) slots when CP/ EX is set and on nibble-wide

(4 bits) slots when CP/ EX is cleared.

A-law (U/ A = 0) and

m-law (U/ A = 1) PCM coding is independently selected for the X and Y channels

by CR.2. If BYP and IPD are cleared, then CP/ EX determines if the input data is to be compressed or

expanded.

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