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STM32F301C6 Datasheet(PDF) 92 Page - STMicroelectronics |
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STM32F301C6 Datasheet(HTML) 92 Page - STMicroelectronics |
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92 / 135 page  Electrical characteristics STM32F301x6 STM32F301x8 92/135 DocID025146 Rev 6 Table 59. IWDG min/max timeout period at 40 kHz (LSI) (1) 1. These timings are given for a 40 kHz clock but the microcontroller internal RC frequency can vary from 30 to 60 kHz. Moreover, given an exact RC oscillator frequency, the exact timings still depend on the phasing of the APB interface clock versus the LSI clock so that there is always a full RC period of uncertainty. Prescaler divider PR[2:0] bits Min timeout (ms) RL[11:0]= 0x000 Max timeout (ms) RL[11:0]= 0xFFF /4 0 0.1 409.6 /8 1 0.2 819.2 /16 2 0.4 1638.4 /32 3 0.8 3276.8 /64 4 1.6 6553.6 /128 5 3.2 13107.2 /256 7 6.4 26214.4 Table 60. WWDG min-max timeout value @72 MHz (PCLK)(1) 1. Guaranteed by design. Prescaler WDGTB Min timeout value Max timeout value 1 0 0.05687 3.6409 2 1 0.1137 7.2817 4 2 0.2275 14.564 8 3 0.4551 29.127 |
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