AS4SD16M16 datasheet(22/52 Pages) MICROSS

22 / 52 page

SDRAM

AS4SD16M16

Rev. 2.6 04/13/15

Micross Components reserves the right to change products or specifications without notice.

TRUTH TABLE 2: CKE1,2,3,4

CKEn-1 CKEn

CURRENT STATE

COMMANDn

ACTIONn

NOTES

Power-Down

Maintain Power-Down

Self Refresh

Maintain Self Refresh

Clock Suspend

Maintain Clock Suspend

Power-Down

COMMAND INHIBIT or NOP Exit Power-Down

Self Refresh

COMMAND INHIBIT or NOP Exit Self Refresh

Clock Suspend

Exit Clock Suspend

All Banks Idle

COMMAND INHIBIT or NOP Power-Down Entry

All Banks Idle

AUTO REFRESH

Self Refresh Entry

Reading or Writing

VALID

Clock Suspend Entry

See Truth Table 3

NOTES:

1. CKE

n is the logic state of CKE at clock edge n; CKEn-1 was the state of CKE at the previous clock edge.

2. Current state is the state of the SDRAM immediately prior to clock edge n.

3. COMMAND

n is the command registered at clock edge n, and ACTIONn is a result of COMMANDn.

4. All states and sequences not shown are illegal or reserved.

5. Exiting power-down at clock edge n will put the device in the all banks idle state in time for clock edge n+1 (provided

that t

CKS is met).

6. Exiting self refresh at clock edge n will put the device in the all banks idle state once t

XSR is met. COMMAND INHIBIT or

NOP commands should be issued on any clock edges occurring during the t

XSR period. A minimum of two NOP commands

must be provided during t

XSR period.

7. After exiting clock suspend at clock edge n, the device will resume operation and recognize the next command at clock

edge n+1.

AS4SD16M16 Datasheet(PDF) 22 Page - Micross Components

AS4SD16M16 Datasheet(HTML) 22 Page - Micross Components

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