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MPC750AM Datasheet(PDF) 21 Page - Motorola, Inc |
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MPC750AM Datasheet(HTML) 21 Page - Motorola, Inc |
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21 / 44 page  MPC750A RISC Microprocessor Hardware Specifications 21 Electrical and Thermal Characteristics Figure 10 provides the JTAG clock input timing diagram. Figure 10. JTAG Clock Input Timing Diagram Figure 11 provides the TRST timing diagram. Figure 11. TRST Timing Diagram 11 TMS, TDI data hold time 12 — ns 12 TCK to TDO data valid 4 12 ns 13 TCK to TDO high impedance 3 9 ns 4 Notes: 1. TRST is an asynchronous level sensitive signal. The setup time is for test purposes only. 2. Non-JTAG signal input timing with respect to TCK. 3. Non-JTAG signal output timing with respect to TCK. 4. Guaranteed by design and characterization. Table 14. JTAG AC Timing Specifications (Independent of SYSCLK) (Continued) At recommended operating conditions (See Table 3), CL = 50 pF Num Characteristic Min Max Unit Notes TCK 2 2 1 VM VM VM 3 3 VM = Midpoint Voltage 5 TRST Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com AR CH IVE D B Y F RE ES CA LE SE MI CO ND UC TO R, INC . |
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