MAX96708 datasheet(14/68 Pages) MAXIM

14 / 68 page

(VDVDD = VAVDD = 1.7 to 1.9V, VIOVDD = 1.7V to 3.6V, RL = 100Ω ±1% (differential), EP connected to PCB ground, TA = -40°C to

+115°C, Typical values are at, VDVDD = VAVDD = VIOVDD = 1.8V, TA = +25°C, unless otherwise noted.) (Note 1)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

START Condition Hold Time

tHD:STA

fSCL range, Low

µs

fSCL range, Mid

0.6

fSCL range, High

0.26

Low Period of SCL Clock

tLOW

fSCL range, Low

4.7

µs

fSCL range, Mid

1.3

fSCL range, High

0.5

High Period of SCL Clock

tHIGH

fSCL range, Low

µs

fSCL range, Mid

0.6

fSCL range, High

0.26

Repeated START Condition

Setup Time

tSU:STA

fSCL range, Low

4.7

µs

fSCL range, Mid

0.6

fSCL range, High

0.26

Data Hold Time

tHD:DAT

fSCL range, Low

fSCL range, Mid

fSCL range, High

Data Setup Time

tSU:DAT

fSCL range, Low

250

fSCL range, Mid

100

fSCL range, High

Setup Time for STOP

Condition

tSU:STO

fSCL range, Low

µs

fSCL range, Mid

0.6

fSCL range, High

0.26

Bus Free Time

tBUF

fSCL range, Low

4.7

µs

fSCL range, Mid

1.3

fSCL range, High

0.5

Data Valid Time

tVD:DAT

fSCL range, Low

3.45

µs

fSCL range, Mid

0.9

fSCL range, High

0.45

Data Valid Acknowledge Time

tVD:ACK

fSCL range, Low

3.45

µs

fSCL range, Mid

0.9

fSCL range, High

0.45

Pulse Width of Spikes

Suppressed

tSP

fSCL range, Low

fSCL range, Mid

fSCL range, High

Capacitive load each bus line

100

AC Electrical Characteristics (continued)

www.maximintegrated.com

Maxim Integrated │ 14

MAX96708

14-Bit GMSL Deserializer

with Coax or STP Cable Input

MAX96708 Datasheet(PDF) 14 Page - Maxim Integrated Products

MAX96708 Datasheet(HTML) 14 Page - Maxim Integrated Products

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68

Datasheet Download

Link URL