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WM8974 Datasheet(PDF) 51 Page - Wolfson Microelectronics plc |
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WM8974 Datasheet(HTML) 51 Page - Wolfson Microelectronics plc |
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51 / 63 page ![]() Product Preview WM8974 w PP Rev 1.1 September 2004 51 RECOMMENDED POWER UP/DOWN SEQENCE In order to minimise output ‘pop’ and ‘click’ noise it is recommended that the device is powered up in a controlled sequence. In addition to this it is recommended that the zero cross functions are used when changing the volume in the PGAs. POWER MANAGEMENT SAVING POWER BY REDUCING OVERSAMPLING RATE The default mode of operation of the ADC and DAC digital filters is in 64x oversampling mode. Under the control of ADCOSR and DACOSR the oversampling rate may be doubled. 64x oversampling results in a slight decrease in noise performance compared to 128x but lowers the power consumption of the device. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R10 DAC control 3 DACOSR128 0 DAC oversample rate select 0 = 64x (lowest power) 1 = 128x (best SNR) R14 ADC control 3 ADCOSR128 0 ADC oversample rate select 0 = 64x (lowest power) 1 = 128x (best SNR) Table 42 ADC and DAC Oversampling Rate Selection VMID The analogue circuitry will not work unless VMID is enabled (VMIDSEL 00). The impedance of the VMID resistor string, together with the decoupling capacitor on the VMID pin will determine the startup time of the VMID circuit. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R1 Power management 1 1:0 VMIDSEL 00 Reference string impedance to VMID pin (detemines startup time): 00=off (open circuit) 01=75kΩ 10=300kΩ 11=2.5kΩ (for fastest startup) Table 43 VMID Impedance Control |
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