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P87CL52X2 Datasheet(PDF) 2 Page - NXP Semiconductors

Part # P87CL52X2
Description  80C51 8-bit microcontroller family
PDF  47 Pages
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

P87CL52X2 Datasheet(HTML) 2 Page - NXP Semiconductors

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Philips Semiconductors
Product data
P87CL52X2/54X2
80C51 8-bit microcontroller family
8K/16K OTP 256 bytes RAM ROMless low voltage
(1.8 V to 3.3 V), low power, high speed (33 MHz)
2
2003 May 14
853-2427 29875
DESCRIPTION
The Philips P87CL5xX2 is a high-performance static 80C51 design
fabricated with Philips high-density CMOS technology with operation
from 1.8 V to 3.3 V.
The P87CL5xX2 ROMless devices contain a 256
× 8 RAM, 32 I/O
lines, three 16-bit counter/timers, a six-source, four-priority level
nested interrupt structure, a serial I/O port for either multi-processor
communications, I/O expansion or full duplex UART, and on-chip
oscillator and clock circuits.
In addition, the device is a low power static design which offers a
wide range of operating frequencies down to zero. Two software
selectable modes of power reduction — idle mode and power-down
mode — are available. The idle mode freezes the CPU while
allowing the RAM, time rs, serial port, and interrupt system to
continue functioning. The power-down mode saves the RAM
contents but freezes the oscillator, causing all other chip functions to
be inoperative. Since the design is static, the clock can be stopped
without loss of user data and then the execution resumed from the
point the clock was stopped.
FEATURES
• 8051 Central Processing Unit
– TSSOP or LQFP packages
– 256
× 8 RAM
– Three 16-bit counter/timers
– Boolean processor
– Full static operation
– Low voltage (1.8 V to 3.3 V@ 12 MHz) operation (12-clock
mode)
• Memory addressing capability
– 64k ROM and 64k RAM
• Power control modes:
– Clock can be stopped and resumed
– Idle mode
– Power-down mode
• CMOS and TTL compatible
• Two speed ranges at V
CC = 3.3 V
– 0 to 16 MHz (6-clock mode)
– 0 to 33 MHz (12-clock mode)
• Dual Data Pointers
• Four priority interrupt levels
• Six interrupt sources
• Four 8-bit I/O ports
• Full–duplex enhanced UART
– Framing error detection
– Automatic address recognition
• Programmable clock out
• Asynchronous port reset
• Low EMI (inhibit ALE)
• Wake-up from Power Down by an external interrupt



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