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AFE5808A Datasheet(PDF) 8 Page - Texas Instruments

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Part # AFE5808A
Description  65-MSPS, 158 mW/Channel, Fully-Integrated, 8-Channel, 14- and 12-Bit, Ultrasound Analog Front-End With Passive CW Mixer
PDF  83 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

AFE5808A Datasheet(HTML) 8 Page - Texas Instruments

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AFE5808A
SLOS729D – OCTOBER 2011 – REVISED NOVEMBER 2015
www.ti.com
Pin Functions (continued)
PIN
TYPE
DESCRIPTION
NAME
NO.
ADC partial (fast) power down control pin with an internal pull down resistor of 100 k
Ω. Active High. Either 1.8-
PDN_ADC
L8
I
V or 3.3-V logic level can be used.
VCA partial (fast) power down control pin with an internal pull down resistor of 20 k
Ω. Active High. 3.3-V logic
PDN_VCA
J8
I
level is recommended.
Global (complete) power-down control pin for the entire chip with an internal pull down resistor of 20 k
Ω. Active
PDN_GLOBAL
H8
I
High. 3.3-V logic level is recommended.
0.5-V reference output in the internal reference mode. Must leave floated in the internal reference mode.
REFM
L4
—
Adding test point on PCB is recommended for monitoring the reference output.
1.5-V reference output in the internal reference mode. Must leave floated in the internal reference mode.
REFP
M4
—
Adding test point on PCB is recommended for monitoring the reference output.
RESET
H9
I
Hardware reset pin with an internal pull-down resistor of 20 k
Ω. Active high, 3.3-V logic level is recommended.
SCLK
J9
I
Serial interface clock input with an internal pull-down resistor of 20 k
Ω, 3.3-V logic level is recommended.
SDATA
K9
I
Serial interface data input with an internal pull-down resistor of 20 k
Ω, 3.3-V logic level is recommended.
SDOUT
M9
O
Serial interface data readout. High impedance when readout is disabled, 1.8-V logic
SEN
L9
I
Serial interface enable with an internal pull up resistor of 20 k
Ω. Active low, 3.3-V logic level is recommended.
VCNTLM
K4
I
Negative differential attenuation control pin. Common mode voltage is 0.75V.
VCNTLP
K3
I
Positive differential attenuation control pin. Common mode voltage is 0.75V.
VHIGH
K5
Bias
Bias voltage; bypass to ground with
≥ 1 µF.
VREF_IN
M3
Bias
ADC 1.4-V reference input in the external reference mode; bypass to ground with 0.1 µF.
K7, L5~L7,
DNC
M5~M8, N4,
—
Do not connect. Must leave floated.
N6
8
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Product Folder Links: AFE5808A



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