MPC8240 datasheet(7/52 Pages) MOTOROLA

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MOTOROLA

MPC8240 Integrated Processor Hardware Specifications

Electrical and Thermal Characteristics

Figure 2 shows the supply voltage sequencing and separation cautions.

Figure 2. Supply Voltage Sequencing and Separation Cautions

OVDD/GVDD/(LVDD @ 3.3 V - - - -)

VDD/AVDD/AVDD2/LAVDD

LVDD @ 5 V

Time

3.3 V

5 V

2.5 V

6,8

Voltage

Regulator

Delay

Reset

Configuration Pins

HRST_CPU and

HRST_CTRL

PLL

Relock

Time 2

100 µs

9 External Memory

Asserted 255

External Memory

HRST_CPU and

HRST_CTRL

VDD Stable

Power Supply Ramp Up

See Note 1

Clock Cycles 2

Clock Cycles Setup Time 3

VM = 1.4 V

One External Memory Clock Cycle 4

Maximum Rise Time Must be Less Than

Notes:

1. Numbers associated with waveform separations correspond to caution numbers listed in Table 2.

2. Refer to Table 7 for additional information on PLL relock and reset signal assertion timing requirements.

3. Refer to Table 8 for additional information on reset configuration pin setup timing requirements.

4. For the device to be in the non-reset state, HRST_CPU/HRST_CTRL must transition from a logic 0 to a

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

MPC8240 Datasheet(PDF) 7 Page - Motorola, Inc

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