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PCM1796DB Datasheet(PDF) 21 Page - Burr-Brown (TI)

[Old version datasheet] Texas Instruments acquired Burr-Brown Corporation. Click here to check the latest version.
Part # PCM1796DB
Description  24BIT 192 KHZ SAMPLING ADVANCED SEGMENT AUDIO STEREO DIGITAL TO ANALOG CONVERTER
PDF  57 Pages
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Manufacturer  BURR-BROWN [Burr-Brown (TI)]
Direct Link  http://www.burr-brown.com
Logo BURR-BROWN - Burr-Brown (TI)

PCM1796DB Datasheet(HTML) 21 Page - Burr-Brown (TI)

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PCM1796
SLES100 − DECEMBER 2003
www.ti.com
21
I2C INTERFACE
The PCM1796 supports the I2C serial bus and the data transmission protocol for standard and fast mode as a slave
device. This protocol is explained in I2C specification 2.0.
In I2C mode, the control terminals are changed as follows.
TERMINAL NAME
TDMCA NAME
PROPERTY
DESCRIPTION
MS
ADR0
Input
I2C address 0
MDI
ADR1
Input
I2C address 1
MC
SCL
Input
I2C clock
MDO
SDA
Input/output
I2C data
Slave Address
MSB
LSB
1
0
0
1
1
ADR1
ADR0
R/W
The PCM1796 has 7 bits for its own slave address. The first five bits (MSBs) of the slave address are factory preset
to 10011. The next two bits of the address byte are the device select bits which can be user-defined by the ADR1
and ADR0 terminals. A maximum of four PCM1796s can be connected on the same bus at one time. Each PCM1796
responds when it receives its own slave address.
Packet Protocol
A master device must control packet protocol, which consists of start condition, slave address, read/write bit, data
if write or acknowledge if read, and stop condition. The PCM1796 supports only slave receivers and slave
transmitters.
9
SDA
SCL
St
Start
1−7
8
1−8
9
1−8
9
9
Sp
Stop
Slave Address
ACK
DATA
ACK
DATA
ACK
ACK
Condition
Condition
R/W
Read Operation
Transmitter
M
M
M
S
S
M
S
M
M
M
Data Type
St
Slave Address
R
ACK
DATA
ACK
DATA
ACK
NACK
Sp
Write Operation
Transmitter
M
M
M
S
M
S
M
S
S
M
Data Type
St
Slave Address
W
ACK
DATA
ACK
DATA
ACK
ACK
Sp
R/W:
Read Operation if 1; Otherwise, Write Operation
ACK: Acknowledgement of a Byte if 0
NACK: Not Acknowledgement if 1
DATA: 8 Bits (Byte)
M: Master Device
S: Slave Device
St: Start Condition
Sp: Stop Condition
W: Write
R: Read
ACK: Acknowledge
NACK: Not Acknowledge
Figure 31. Basic I2C Framework



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