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PC87351 Datasheet(PDF) 45 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # PC87351
Description  PC87351 PC98 and ACPI Compliant SuperI/O with System Wake-Up Control
PDF  86 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

PC87351 Datasheet(HTML) 45 Page - National Semiconductor (TI)

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2.0 Device Architecture and Configuration (Continued)
45
www.national.com
2.11.2
Configuration
2.11.3
KBC Configuration Register
This register is reset by hardware to 40h.
Location:
Index F0h
Type:
R/W
Usage Hints: When required to change the clock frequency of the KBC, perform the following:
1. Disable the KBC logical device.
2. Change the frequency setting.
3. Enable the KBC logical device.
Index
Mouse Configuration Register or Action
Type
Reset
30h
Activate. See also bit 0 of the SIOCF1. When the Mouse of the KBC is inactive, the
IRQ selected by the Mouse Interrupt Number Register (index 70h) is not asserted.
This register has no effect on host KBC commands handling the PS/2 Mouse.
R/W
00h
70h
Mouse Interrupt Number
R/W
0Ch
71h
Mouse Interrupt Type. Bits 1,0 are read/write; other bits are read only.
R/W
02h
74h
Report no DMA assignment
RO
04h
75h
Report no DMA assignment
RO
04h
Index
Keyboard Configuration Register or Action
Type
Reset
30h
Activate. See also bit 0 of the SIOCF1.
R/W
01h
60h
Base Address MSB Register. Bits 7-3 (for A15-11) are read only, 00000b.
R/W
00h
61h
Base Address LSB Register. Bits 2-0 are read only 000b.
R/W
60h
62h
Command Base Address MSB Register. Bits 7-3 (for A15-11) are read only, 00000b.
R/W
00h
63h
Command Base Address LSB. Bits 2-0 are read only 100b.
R/W
64h
70h
KBC Interrupt Number
R/W
01h
71h
KBC Interrupt Type. Bits 1,0 are read/write; others are read only.
R/W
02h
74h
Report no DMA assignment
RO
04h
75h
Report no DMA assignment
RO
04h
F0h
KBC Configuration Register
R/W
40h
Bit
76543210
Name
KBC Clock Source
Reserved
TRI-STATE
Control
Reset
01000000
Required
0
Bit
Description
7-6
KBC Clock Source. The clock source can be changed only when the KBC is inactive (disabled).
Bits
7 6
Function
0 0
8 MHz
0 1
12 MHz (default)
1 0
16 MHz
1 1
Reserved
5-1
Reserved. Use read-modify-write to change the value of the register. Do not change the value of these bits. Bit
2 must be 0.
0
TRI-STATE Control. If KBC is inactive (disabled) when this bit is set, the KBC pins (KBCLK and KBDAT) are in TRI-
STATE. If Mouse is inactive (disabled) when this bit is set, the Mouse pins (MCLK and MDAT) are in TRI-STATE.
0: Disabled (default)
1: Enabled when device inactive



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