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SCAN18541T Datasheet(PDF) 1 Page - National Semiconductor (TI) |
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SCAN18541T Datasheet(HTML) 1 Page - National Semiconductor (TI) |
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1 / 14 page  SCAN18541T Non-Inverting Line Driver with TRI-STATE® Outputs General Description The SCAN18541T is a high speed, low-power line driver fea- turing separate data inputs organized into dual 9-bit bytes with byte-oriented paired output enable control signals. This device is compliant with IEEE 1149.1 Standard Test Access Port and Boundary Scan Architecture with the incorporation of the defined boundary-scan test logic and test access port consisting of Test Data Input (TDI), Test Data Out (TDO), Test Mode Select (TMS), and Test Clock (TCK). Features n IEEE 1149.1 (JTAG) Compliant n Dual output enable signals per byte n TRI-STATE outputs for bus-oriented applications n 9-bit data busses for parity applications n Reduced-swing outputs source 24 mA/sink 48 mA (Mil) n Guaranteed to drive 50 Ω transmission line to TTL input levels of 0.8V and 2.0V n TTL compatible inputs n 25 mil pitch Cerpack packaging n Includes CLAMP and HIGHZ instructions n Standard Microcircuit Drawing (SMD) 5962-9311601 Connection Diagram Pin Names Pin Names Description AI (0–8) Input Pins, A Side BI (0–8) Input Pins, B Side Pin Names Description AOE 1, AOE 2 TRI-STATE Output Enable Input Pins, A Side BOE 1, BOE 2 TRI-STATE Output Enable Input Pins, B Side AO (0–8) Output Pins, A Side AO (0–8) Output Pins, B Side TRI-STATE® is a registered trademark of National Semiconductor Corporation. DS100324-1 September 1998 © 1998 National Semiconductor Corporation DS100324 www.national.com |
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