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ST72325AR7-Auto Datasheet(PDF) 104 Page - STMicroelectronics |
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ST72325AR7-Auto Datasheet(HTML) 104 Page - STMicroelectronics |
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104 / 243 page  Obsolete Product(s) - Obsolete Product(s) 16-bit timer ST72325xxx-Auto 104/243 Doc ID 13770 Rev 3 Figure 43. Timer block diagram 1. If IC, OC and TO interrupt request have separate vectors, then the last OR is not present (see device interrupt vector table). MCU-PERIPHERAL INTERFACE COUNTER ALTERNATE OUTPUT COMPARE REGISTER OUTPUT COMPARE EDGE DETECT OVERFLOW DETECT CIRCUIT 1/2 1/4 1/8 8-bit buffer ST7 INTERNAL BUS LATCH1 OCMP1 ICAP1 EXTCLK fCPU TIMER INTERRUPT ICF2 ICF1 TIMD 0 0 OCF2 OCF1 TOF PWM OC1E EXEDG IEDG2 CC0 CC1 OC2E OPM FOLV2 ICIE OLVL1 IEDG1 OLVL2 FOLV1 OCIE TOIE ICAP2 LATCH2 OCMP2 8 8 8 low 16 8 high 16 16 16 16 (Control Register 1) CR1 (Control Register 2) CR2 6 16 8 8 8 8 8 8 EXEDG TIMER INTERNAL BUS CIRCUIT1 EDGE DETECT CIRCUIT2 CIRCUIT 1 OUTPUT COMPARE REGISTER 2 INPUT CAPTURE REGISTER 1 INPUT CAPTURE REGISTER 2 CC[1:0] COUNTER pin pin pin pin pin REGISTER REGISTER (1) CSR (Control/Status Register) |
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