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ST72325AR7-Auto Datasheet(PDF) 107 Page - STMicroelectronics

Part # ST72325AR7-Auto
Description  SCI asynchronous serial interface
PDF  243 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST72325AR7-Auto Datasheet(HTML) 107 Page - STMicroelectronics

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ST72325xxx-Auto
16-bit timer
Doc ID 13770 Rev 3
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13.3.3
Input capture
In this section, the index, i, may be 1 or 2 because there are two input capture functions in
the 16-bit timer.
The two 16-bit input capture registers (IC1R and IC2R) are used to latch the value of the
free running counter after a transition is detected on the ICAPi pin (see Figure 48).
ICiR register is a read-only register.
The active transition is software programmable through the IEDGi bit of Control Registers
(CRi).
Timing resolution is one count of the free running counter: (fCPU/CC[1:0]).
Procedure:
To use the input capture function select the following in the CR2 register:
●
Select the timer clock (CC[1:0]) (see Table 62: Timer clock selection).
●
Select the edge of the active transition on the ICAP2 pin with the IEDG2 bit (the ICAP2
pin must be configured as floating input or input with pull-up without interrupt if this
configuration is available).
And select the following in the CR1 register:
●
Set the ICIE bit to generate an interrupt after an input capture coming from either the
ICAP1 pin or the ICAP2 pin
●
Select the edge of the active transition on the ICAP1 pin with the IEDG1 bit (the
ICAP1pin must be configured as floating input or input with pull-up without interrupt if
this configuration is available).
When an input capture occurs:
●
ICFi bit is set.
●
The ICiR register contains the value of the free running counter on the active transition
on the ICAPi pin (see Figure 49).
●
A timer interrupt is generated if the ICIE bit is set and the I bit is cleared in the CC
register. Otherwise, the interrupt remains pending until both conditions become true.
Clearing the input capture interrupt request (that is, clearing the ICFi bit) is done in two
steps:
1.
Reading the SR register while the ICFi bit is set
2.
An access (read or write) to the ICiLR register
Note:
1
After reading the ICiHR register, transfer of input capture data is inhibited and ICFi will never
be set until the ICiLR register is also read.
2
The ICiR register contains the free running counter value which corresponds to the most
recent input capture.
3
The two input capture functions can be used together even if the timer also uses the two
output compare functions.
4
In One pulse Mode and PWM mode only Input Capture 2 can be used.
MS Byte
LS Byte
ICiR
ICiHR
ICiLR



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