STM8S105C4 datasheet(73/121 Pages) STMICROELECTRONICS

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STM8S105x4/6

Electrical characteristics

10.3.6

I/O port pin characteristics

General characteristics

Subject to general operating conditions for VDD and TA unless otherwise specified. All

unused pins must be kept at a fixed voltage, using the output mode of the I/O for example or

an external pull-up or pull-down resistor.

Table 37. I/O static characteristics

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VIL

Input low level voltage

VDD = 5 V

-0.3 V

0.3 x VDD

VIH

Input high level voltage

0.7 x VDD

-VDD + 0.3 V

Vhys

Hysteresis(1)

-700

Rpu

Pull-up resistor

VDD = 5 V, VIN = VSS



tR, tF

Rise and fall time



(10% - 90%)

Fast I/Os

Load = 50 pF

35(2)

Standard and high sink I/Os

Load = 50 pF

125(2)

tR, tF

Rise and fall time



(10% - 90%)

Fast I/Os

Load = 20 pF

20(2)

Standard and high sink I/Os

Load = 20 pF

50(2)

Ilkg

Digital input leakage

current

VSS VIN VDD

±1(3)

µA

Ilkg ana

Analog input leakage

current

VSS VIN VDD

±250(3)

Ilkg(inj)

Leakage current in

adjacent I/O

Injection current ±4 mA

±1(3)

µA

1. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested in production.

2. Data guaranteed by design.

3. Data based on characterization results, not tested in production

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