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STM32F101XF Datasheet(PDF) 78 Page - STMicroelectronics

Part # STM32F101XF
Description  Single-cycle multiplication and hardware division
PDF  117 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32F101XF Datasheet(HTML) 78 Page - STMicroelectronics

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Electrical characteristics
STM32F101xF, STM32F101xG
78/117
DocID16553 Rev 5
5.3.12
Absolute maximum ratings (electrical sensitivity)
Based on three different tests (ESD, LU) using specific measurement methods, the device is
stressed in order to determine its performance in terms of electrical sensitivity.
Electrostatic discharge (ESD)
Electrostatic discharges (a positive then a negative pulse separated by 1 second) are
applied to the pins of each sample according to each pin combination. The sample size
depends on the number of supply pins in the device (3 parts × (n+1) supply pins). This test
conforms to the JESD22-A114/JESD22-C101 standard.
Static latch-up
Two complementary static tests are required on six parts to assess the latch-up
performance:
•
A supply overvoltage is applied to each power supply pin
•
A current injection is applied to each input, output and configurable I/O pin
These tests are compliant with EIA/JESD 78 IC latch-up standard.
5.3.13
I/O current injection characteristics
As a general rule, current injection to the I/O pins, due to external voltage below VSS or
above VDD (for standard, 3 V-capable I/O pins) should be avoided during normal product
operation. However, in order to give an indication of the robustness of the microcontroller in
cases when abnormal injection accidentally happens, susceptibility tests are performed on a
sample basis during device characterization.
Functional susceptibilty to I/O current injection
While a simple application is executed on the device, the device is stressed by injecting
current into the I/O pins programmed in floating input mode. While current is injected into
the I/O pin, one at a time, the device is checked for functional failures.
The failure is indicated by an out of range parameter: ADC error above a certain limit (>5
LSB TUE), out of spec current injection on adjacent pins or other functional failure (for
example reset, oscillator frequency deviation).
Table 44. ESD absolute maximum ratings
Symbol
Ratings
Conditions
Class
Maximum
value(1)
1. Guaranteed by characterization results.
Unit
VESD(HBM)
Electrostatic discharge
voltage (human body model)
TA = +25 °C, conforming to
JESD22-A114
2
2000
V
VESD(CDM)
Electrostatic discharge
voltage (charge device model)
TA = +25 °C, conforming to
JESD22-C101
III
500
Table 45. Electrical sensitivities
Symbol
Parameter
Conditions
Class
LU
Static latch-up class
TA = +85 °C conforming to JESD78A
II level A



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