AS8C403625 datasheet(5/19 Pages) ALSC

5 / 19 page

6.42

IDT71V3577, IDT71V3579, 128K x 36, 256K x 18, 3.3V Synchronous SRAMs with

3.3V I/O, Flow-Through Outputs, Burst Counter, Single Cycle Deselect

Commercial and Industrial Temperature Ran ges

Pin Configuration – 128K x 36

100 TQFP

Top View

NOTES:

1. Pin 14 does not have to be directly connected to VSS as long as the input voltage is < VIL.

2. Pin 64 can be left unconnected and the device will always remain in active mode.

100 999897 9695 94 93 92 91 90

87868584 8382 81

89 88

31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50

I/OP4

I/O31

I/O30

VDDQ

VSS

I/O29

I/O28

I/O27

I/O26

VSS

VDDQ

I/O25

I/O24

VSS(1)

VDD

I/O23

I/O22

VDDQ

VSS

I/O21

I/O20

I/O19

I/O18

VSS

VDDQ

I/O17

I/O16

I/OP3

I/OP2

I/O14

VDDQ

VSS

I/O13

I/O12

I/O11

I/O10

VSS

VDDQ

I/O9

I/O8

VSS

VDD

ZZ (2)

I/O7

I/O6

VDDQ

VSS

I/O5

I/O4

I/O3

I/O2

VSS

VDDQ

I/O1

I/O0

I/OP1

VSS

I/O15

5280 drw 02a

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