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STA559BW Datasheet(PDF) 15 Page - STMicroelectronics

Part # STA559BW
Description  Selectable 32- to 192-kHz input sample rates
PDF  67 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STA559BW Datasheet(HTML) 15 Page - STMicroelectronics

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STA559BW
Electrical specifications
67
3.6
Power on/off sequence
Figure 4. Power-on sequence
Note:
The definition of a stable clock is when fmax - fmin < 1 MHz.
Section : Serial data interface on page 25 gives information on setting up the I²SI²S
interface.
Figure 5. Power-off sequence for pop-free turn-off
Don’t care
Don’t care
CMD0
CMD1
CMD2
VCC
VDD_Dig
XTI
Reset
I2C
PWDN
TR
TC
Don’t care
Don’t care
CMD0
CMD1
CMD2
VCC
VDD_Dig
XTI
Reset
I2C
PWDN
TR
TC
Don’t care
Don’t care
Don’t care
CMD0
CMD1
CMD2
VCC
VDD_Dig
XTI
Reset
I2C
PWDN
TR
TC
Don’t care
Don’t care
CMD0
CMD1
CMD2
VCC
VDD_Dig
XTI
Reset
I2C
PWDN
TR
TC
Don’t care
Don’t care
CMD0
CMD1
CMD2
VCC
VDD_Dig
XTI
Reset
I2C
PWDN
TR
TC
Don’t care
Note: no specific VCC and
VDD_DIG turn
on sequence
is required
TR = minimum time between XTI master clock stable and Reset removal: 1 ms
TC = minimum time between Reset removal and I²C program, sequence start: 1ms
Don’t care
VCC
VDD_Dig
XTI
Don’t care
Soft Mute
Reg. 0x07
Data 0xFE
Soft EAPD
Reg. 0x05
Bit 7 = 0
Don’t care
FE
Don’t care
Don’t care
Don’t care
VCC
VDD_Dig
XTI
Don’t care
Soft Mute
Reg. 0x07
Data 0xFE
Soft EAPD
Reg. 0x05
Bit 7 = 0
Don’t care
FE
Don’t care
Don’t care
Note: no specific VCC and
VDD_DIG turn
off sequence
is required



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