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NAND256-A Datasheet(PDF) 54 Page - STMicroelectronics |
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NAND256-A Datasheet(HTML) 54 Page - STMicroelectronics |
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54 / 57 page ![]() NAND128-A, NAND256-A, NAND512-A, NAND01G-A 54/57 APPENDIX A. HARDWARE INTERFACE EXAMPLES Nand Flash devices can be connected to a micro- controller system bus for code and data storage. For microcontrollers that have an embedded NAND controller the NAND Flash can be connect- ed without the addition of glue logic (see Figure 43.). However a minimum of glue logic is required for general purpose microcontrollers that do not have an embedded NAND controller. The glue logic usually consists of a flip-flop to hold the Chip Enable, Address Latch Enable and Com- mand Latch Enable signals stable during com- mand and address latch operations, and some logic gates to simplify the firmware or make the de- sign more robust. Figure 44. gives an example of how to connect a NAND Flash to a general purpose microcontroller. The additional OR gates allow the microcontrol- ler’s Output Enable and Write Enable signals to be used for other peripherals. The OR gate between A3 and CSn maps the flip-flop and NAND I/O in different address spaces inside the same chip se- lect unit, which improves the setup and hold times and simplifies the firmware. The structure uses the microcontroller DMA (Direct Memory Access) en- gines to optimize the transfer between the NAND Flash and the system RAM. For any interface with glue logic, the extra delay caused by the gates and flip-flop must be taken into account. This delay must be added to the mi- crocontroller’s AC characteristics and register set- tings to get the NAND Flash setup and hold times. For mass storage applications (hard disk emula- tions or systems where a huge amount of storage is required) NAND Flash memories can be con- nected together to build storage modules (see Fig- ure 45.). Figure 43. Connection to Microcontroller, Without Glue Logic AI08045b R W I/O E AL CL W G CSn AD(24:16) Microcontroller NAND Flash DQ WP RB PWAITEN AD17 AD16 VDD VDD or VSS or General Purpose I/O |
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